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drivers/clock_control: stm32u5: Centralize regu voltage setting

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Similar to other general settings, centralize regu voltage
setting.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-03-04 11:07:47 +01:00 • committed by Carles Cufí
commit 30b3a5ffe7
1 changed files with 3 additions and 4 deletions
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7
drivers/clock_control/clock_stm32_ll_u5.c
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@ -314,8 +314,6 @@ void config_src_sysclk_pll(LL_UTILS_ClkInitTypeDef s_ClkInitStruct)
LL_RCC_PLL1_SetQ(STM32_PLL_Q_DIVISOR); LL_RCC_PLL1_SetQ(STM32_PLL_Q_DIVISOR);
} }
set_regu_voltage(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
if (IS_ENABLED(STM32_PLL_SRC_MSIS)) { if (IS_ENABLED(STM32_PLL_SRC_MSIS)) {
set_up_clk_msis(); set_up_clk_msis();
@ -382,8 +380,6 @@ void config_src_sysclk_msis(LL_UTILS_ClkInitTypeDef s_ClkInitStruct)
{ {
#ifdef STM32_SYSCLK_SRC_MSIS #ifdef STM32_SYSCLK_SRC_MSIS
set_regu_voltage(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
/* Set MSIS as SYSCLCK source */ /* Set MSIS as SYSCLCK source */
set_up_clk_msis(); set_up_clk_msis();
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSIS); LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSIS);
@ -415,6 +411,9 @@ int stm32_clock_control_init(const struct device *dev)
/* configure clock for AHB/APB buses */ /* configure clock for AHB/APB buses */
config_bus_clk_init((LL_UTILS_ClkInitTypeDef *)&s_ClkInitStruct); config_bus_clk_init((LL_UTILS_ClkInitTypeDef *)&s_ClkInitStruct);
/* Set voltage regulator to comply with targeted system frequency */
set_regu_voltage(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
/* Current hclk value */ /* Current hclk value */
old_hclk_freq = __LL_RCC_CALC_HCLK_FREQ(get_startup_frequency(), LL_RCC_GetAHBPrescaler()); old_hclk_freq = __LL_RCC_CALC_HCLK_FREQ(get_startup_frequency(), LL_RCC_GetAHBPrescaler());