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dts: arm: nxp_rt: Add GPT nodes

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i.MX RT chips have two GPT modules.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
This commit is contained in:
Loic Poulain 2019-03-21 15:46:41 +01:00 • committed by Maureen Helm
commit 304c5fd196
3 changed files with 53 additions and 0 deletions
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14
dts/arm/nxp/nxp_rt.dtsi
View file

@ -81,6 +81,20 @@
#size-cells = <1>; #size-cells = <1>;
}; };
gpt1: gpt@401ec000 {
compatible = "nxp,imx-gpt";
reg = <0x401ec000 0x4000>;
interrupts = <100 0>;
label = "GPT1";
};
gpt2: gpt@401f0000 {
compatible = "nxp,imx-gpt";
reg = <0x401f0000 0x4000>;
interrupts = <101 0>;
label = "GPT2";
};
ccm: ccm@400fc000 { ccm: ccm@400fc000 {
compatible = "nxp,imx-ccm"; compatible = "nxp,imx-ccm";
reg = <0x400fc000 0x4000>; reg = <0x400fc000 0x4000>;

27
dts/bindings/timer/nxp,imx-gpt.yaml Normal file
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@ -0,0 +1,27 @@
#
# Copyright (c) 2018 Nordic Semiconductor ASA
#
# SPDX-License-Identifier: Apache-2.0
#
---
title: NXP MCUX General Purpose Timer
version: 0.1
description: >
This is a representation of the NXP MCUX General Purpose Timer (GPT)
inherits:
!include base.yaml
properties:
compatible:
constraint: "nxp,imx-gpt"
reg:
category: required
interrupts:
category: required
label:
category: required

12
soc/arm/nxp_imx/rt/dts_fixup.h
View file

@ -104,6 +104,18 @@
#define DT_UART_MCUX_LPUART_3_CLOCK_NAME DT_NXP_KINETIS_LPUART_4018C000_CLOCK_CONTROLLER #define DT_UART_MCUX_LPUART_3_CLOCK_NAME DT_NXP_KINETIS_LPUART_4018C000_CLOCK_CONTROLLER
#define DT_UART_MCUX_LPUART_3_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_4018C000_CLOCK_NAME #define DT_UART_MCUX_LPUART_3_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_4018C000_CLOCK_NAME
#define DT_COUNTER_MCUX_GPT_1_BASE_ADDRESS DT_NXP_IMX_GPT_401EC000_BASE_ADDRESS
#define DT_COUNTER_MCUX_GPT_1_IRQ DT_NXP_IMX_GPT_401EC000_IRQ_0
#define DT_COUNTER_MCUX_GPT_1_IRQ_PRI DT_NXP_IMX_GPT_401EC000_IRQ_0_PRIORITY
#define DT_COUNTER_MCUX_GPT_1_NAME DT_NXP_IMX_GPT_401EC000_LABEL
#define DT_RTC_0_NAME DT_COUNTER_MCUX_GPT_1_NAME
#define DT_COUNTER_MCUX_GPT_2_BASE_ADDRESS DT_NXP_IMX_GPT_401F0000_BASE_ADDRESS
#define DT_COUNTER_MCUX_GPT_2_IRQ DT_NXP_IMX_GPT_401F0000_IRQ_0
#define DT_COUNTER_MCUX_GPT_2_IRQ_PRI DT_NXP_IMX_GPT_401F0000_IRQ_0_PRIORITY
#define DT_COUNTER_MCUX_GPT_2_NAME DT_NXP_IMX_GPT_401F0000_LABEL
#define DT_RTC_1_NAME DT_COUNTER_MCUX_GPT_2_NAME
#define DT_ETH_MCUX_0_NAME DT_NXP_KINETIS_ETHERNET_402D8000_LABEL #define DT_ETH_MCUX_0_NAME DT_NXP_KINETIS_ETHERNET_402D8000_LABEL
#define DT_ETH_MCUX_0_MAC3 DT_NXP_KINETIS_ETHERNET_402D8000_LOCAL_MAC_ADDRESS_3 #define DT_ETH_MCUX_0_MAC3 DT_NXP_KINETIS_ETHERNET_402D8000_LOCAL_MAC_ADDRESS_3