From 304c5fd196c87ef3be8e1962b4e3e0226ce1bbda Mon Sep 17 00:00:00 2001 From: Loic Poulain Date: Thu, 21 Mar 2019 15:46:41 +0100 Subject: [PATCH] dts: arm: nxp_rt: Add GPT nodes i.MX RT chips have two GPT modules. Signed-off-by: Loic Poulain --- dts/arm/nxp/nxp_rt.dtsi | 14 ++++++++++++++ dts/bindings/timer/nxp,imx-gpt.yaml | 27 +++++++++++++++++++++++++++ soc/arm/nxp_imx/rt/dts_fixup.h | 12 ++++++++++++ 3 files changed, 53 insertions(+) create mode 100644 dts/bindings/timer/nxp,imx-gpt.yaml diff --git a/dts/arm/nxp/nxp_rt.dtsi b/dts/arm/nxp/nxp_rt.dtsi index 5ed2a1f8eff..78312e9e72f 100644 --- a/dts/arm/nxp/nxp_rt.dtsi +++ b/dts/arm/nxp/nxp_rt.dtsi @@ -81,6 +81,20 @@ #size-cells = <1>; }; + gpt1: gpt@401ec000 { + compatible = "nxp,imx-gpt"; + reg = <0x401ec000 0x4000>; + interrupts = <100 0>; + label = "GPT1"; + }; + + gpt2: gpt@401f0000 { + compatible = "nxp,imx-gpt"; + reg = <0x401f0000 0x4000>; + interrupts = <101 0>; + label = "GPT2"; + }; + ccm: ccm@400fc000 { compatible = "nxp,imx-ccm"; reg = <0x400fc000 0x4000>; diff --git a/dts/bindings/timer/nxp,imx-gpt.yaml b/dts/bindings/timer/nxp,imx-gpt.yaml new file mode 100644 index 00000000000..0541d81024f --- /dev/null +++ b/dts/bindings/timer/nxp,imx-gpt.yaml @@ -0,0 +1,27 @@ +# +# Copyright (c) 2018 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: NXP MCUX General Purpose Timer +version: 0.1 + +description: > + This is a representation of the NXP MCUX General Purpose Timer (GPT) + +inherits: + !include base.yaml + +properties: + compatible: + constraint: "nxp,imx-gpt" + + reg: + category: required + + interrupts: + category: required + + label: + category: required diff --git a/soc/arm/nxp_imx/rt/dts_fixup.h b/soc/arm/nxp_imx/rt/dts_fixup.h index 9b0b5ef26ac..dd92da7f56f 100644 --- a/soc/arm/nxp_imx/rt/dts_fixup.h +++ b/soc/arm/nxp_imx/rt/dts_fixup.h @@ -104,6 +104,18 @@ #define DT_UART_MCUX_LPUART_3_CLOCK_NAME DT_NXP_KINETIS_LPUART_4018C000_CLOCK_CONTROLLER #define DT_UART_MCUX_LPUART_3_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_4018C000_CLOCK_NAME +#define DT_COUNTER_MCUX_GPT_1_BASE_ADDRESS DT_NXP_IMX_GPT_401EC000_BASE_ADDRESS +#define DT_COUNTER_MCUX_GPT_1_IRQ DT_NXP_IMX_GPT_401EC000_IRQ_0 +#define DT_COUNTER_MCUX_GPT_1_IRQ_PRI DT_NXP_IMX_GPT_401EC000_IRQ_0_PRIORITY +#define DT_COUNTER_MCUX_GPT_1_NAME DT_NXP_IMX_GPT_401EC000_LABEL +#define DT_RTC_0_NAME DT_COUNTER_MCUX_GPT_1_NAME + +#define DT_COUNTER_MCUX_GPT_2_BASE_ADDRESS DT_NXP_IMX_GPT_401F0000_BASE_ADDRESS +#define DT_COUNTER_MCUX_GPT_2_IRQ DT_NXP_IMX_GPT_401F0000_IRQ_0 +#define DT_COUNTER_MCUX_GPT_2_IRQ_PRI DT_NXP_IMX_GPT_401F0000_IRQ_0_PRIORITY +#define DT_COUNTER_MCUX_GPT_2_NAME DT_NXP_IMX_GPT_401F0000_LABEL +#define DT_RTC_1_NAME DT_COUNTER_MCUX_GPT_2_NAME + #define DT_ETH_MCUX_0_NAME DT_NXP_KINETIS_ETHERNET_402D8000_LABEL #define DT_ETH_MCUX_0_MAC3 DT_NXP_KINETIS_ETHERNET_402D8000_LOCAL_MAC_ADDRESS_3