arch: stm32f4/f7: Add OTG HS defines to dts fixup file
Add OTG HS defines to dts fixup file for STM32 F4 and F7 series Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
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2 changed files with 20 additions and 0 deletions
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@ -83,11 +83,21 @@
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#define FLASH_DEV_BASE_ADDRESS ST_STM32F4_FLASH_CONTROLLER_40023C00_BASE_ADDRESS
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#define FLASH_DEV_NAME ST_STM32F4_FLASH_CONTROLLER_40023C00_LABEL
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#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE
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#endif /* ST_STM32_OTGFS_50000000_BASE_ADDRESS */
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#ifdef ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_HS_BASE_ADDRESS ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGHS_40040000_IRQ_OTGHS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGHS_40040000_RAM_SIZE
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#endif /* ST_STM32_OTGHS_40040000_BASE_ADDRESS */
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#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40010000_PWM_LABEL
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#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40010000_PWM_ST_PRESCALER
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@ -50,10 +50,20 @@
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#define CONFIG_UART_STM32_USART_8_NAME ST_STM32_USART_40007800_LABEL
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#define USART_8_IRQ ST_STM32_USART_40007C00_IRQ_0
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#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE
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#endif /* ST_STM32_OTGFS_50000000_BASE_ADDRESS */
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#ifdef ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_HS_BASE_ADDRESS ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGHS_40040000_IRQ_OTGHS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGHS_40040000_RAM_SIZE
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#endif /* ST_STM32_OTGHS_40040000_BASE_ADDRESS */
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/* End of SoC Level DTS fixup file */
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