soc: renesas: ra: Move configs from board deconfig into SoC deconfig
- Move config BUILD_OUTPUT_HEX and CLOK_CONTROL from board deconfig into SoC deconfig - Add clock-frequency in dts to get config SYS_CLOCK_HW_CYCLES_PER_SEC from dts Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
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ad04319673
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46 changed files with 180 additions and 82 deletions
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@ -6,4 +6,15 @@ if SOC_SERIES_RA2A1
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config NUM_IRQS
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default 32
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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endif # SOC_SERIES_RA2A1
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@ -6,6 +6,17 @@ if SOC_SERIES_RA4E2
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA4M2
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA4M3
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,4 +6,15 @@ if SOC_SERIES_RA4W1
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config NUM_IRQS
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default 32
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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endif # SOC_SERIES_RA4W1
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6E1
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6E2
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6M1
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6M2
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6M3
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6M4
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA6M5
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA8D1
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA8M1
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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@ -6,6 +6,17 @@ if SOC_SERIES_RA8T1
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config NUM_IRQS
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default 96
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DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk)
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
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config BUILD_OUTPUT_HEX
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default y
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config CLOCK_CONTROL
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default y
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# Set to the minimal size of data which can be written.
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config FLASH_FILL_BUFFER_SIZE
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default 128
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