diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig b/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig index 85bd6dcd455..15e3f1e271c 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig +++ b/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 TOKITA Hiroshi # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig b/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig index 93569c968fc..770a30fc47d 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig +++ b/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig b/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig index 93569c968fc..770a30fc47d 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig +++ b/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig b/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig index 93569c968fc..770a30fc47d 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig +++ b/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig b/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig index fb7c4482b24..770a30fc47d 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig +++ b/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig b/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig index 882cf699d98..770a30fc47d 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig +++ b/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig b/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig index fb0bf97d888..35ed0307b9a 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig +++ b/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig @@ -1,14 +1,9 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 - # Enable GPIO CONFIG_GPIO=y -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y - # Enable Console CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig b/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig index fb0bf97d888..35ed0307b9a 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig +++ b/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig @@ -1,14 +1,9 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 - # Enable GPIO CONFIG_GPIO=y -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y - # Enable Console CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig b/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig index 914980bc08c..791f9faca40 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig +++ b/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig b/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig index 7d9405d6204..791f9faca40 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig +++ b/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig b/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig index 6a9a032666e..35ed0307b9a 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig +++ b/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig @@ -1,14 +1,9 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 - # Enable GPIO CONFIG_GPIO=y -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y - # Enable Console CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig b/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig index 1f67b94e7c1..35ed0307b9a 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig +++ b/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y -CONFIG_CLOCK_CONTROL=y - -CONFIG_BUILD_OUTPUT_HEX=y diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig b/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig index d20f5032468..35ed0307b9a 100644 --- a/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig +++ b/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig b/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig index 4fd3e749468..770a30fc47d 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig @@ -1,17 +1,11 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 - # Enable GPIO CONFIG_GPIO=y -CONFIG_BUILD_OUTPUT_HEX=y - # Enable Console CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig b/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig index 882cf699d98..770a30fc47d 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,6 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y - -CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig b/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig index 07c0ee5f1ca..35ed0307b9a 100644 --- a/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig +++ b/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig @@ -1,8 +1,6 @@ # Copyright (c) 2024 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000 - # Enable GPIO CONFIG_GPIO=y @@ -11,7 +9,3 @@ CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y - -CONFIG_CLOCK_CONTROL=y - -CONFIG_BUILD_OUTPUT_HEX=y diff --git a/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi b/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi index 6d123486697..511355a8d93 100644 --- a/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi +++ b/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi @@ -141,6 +141,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <48000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi index 7252e48c53b..848309f5e24 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi @@ -155,6 +155,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <100000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi index 5866ffda305..a6dc48199e1 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi @@ -215,6 +215,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <100000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi index 90f5c6ed8da..6ed9030387f 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi @@ -226,6 +226,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <100000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi index 5afa2da38cb..dbecb5edb78 100644 --- a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi +++ b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi @@ -117,6 +117,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <48000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi index 3d368903774..3332ce1d6d7 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi @@ -194,6 +194,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <200000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi index ce0070c22c2..4998e1034b1 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi @@ -153,6 +153,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <200000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi index 174148b8b47..c04daf4a985 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi @@ -108,6 +108,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <120000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi index a407fd1c459..ad78df1ddf2 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi @@ -140,6 +140,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <120000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi index d705afc5694..f9dd42e405c 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi @@ -199,6 +199,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <120000000>; div = <2>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi index d864486b1cc..1b568b5c5a8 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi @@ -302,6 +302,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <200000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi index df6b6e66812..d889317fd74 100644 --- a/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi +++ b/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi @@ -354,6 +354,7 @@ iclk: iclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <200000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi index 5ee87dd34fe..629908e00e4 100644 --- a/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi +++ b/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi @@ -155,6 +155,7 @@ cpuclk: cpuclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <480000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi index 57fa3dd97bf..88661e3abfe 100644 --- a/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi +++ b/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi @@ -125,6 +125,7 @@ cpuclk: cpuclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <480000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi index e2f1b7f8af9..9c45b770951 100644 --- a/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi +++ b/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi @@ -122,6 +122,7 @@ cpuclk: cpuclk { compatible = "renesas,ra-cgc-pclk"; + clock-frequency = <480000000>; div = <1>; #clock-cells = <2>; status = "okay"; diff --git a/soc/renesas/ra/ra2a1/Kconfig.defconfig b/soc/renesas/ra/ra2a1/Kconfig.defconfig index 7176e95746a..e0ae0c6bd23 100644 --- a/soc/renesas/ra/ra2a1/Kconfig.defconfig +++ b/soc/renesas/ra/ra2a1/Kconfig.defconfig @@ -6,4 +6,15 @@ if SOC_SERIES_RA2A1 config NUM_IRQS default 32 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + endif # SOC_SERIES_RA2A1 diff --git a/soc/renesas/ra/ra4e2/Kconfig.defconfig b/soc/renesas/ra/ra4e2/Kconfig.defconfig index f484852e0de..ff781e3becb 100644 --- a/soc/renesas/ra/ra4e2/Kconfig.defconfig +++ b/soc/renesas/ra/ra4e2/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA4E2 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra4m2/Kconfig.defconfig b/soc/renesas/ra/ra4m2/Kconfig.defconfig index 3c6f986e5ff..87ce2fc6817 100644 --- a/soc/renesas/ra/ra4m2/Kconfig.defconfig +++ b/soc/renesas/ra/ra4m2/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA4M2 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra4m3/Kconfig.defconfig b/soc/renesas/ra/ra4m3/Kconfig.defconfig index 717b6bce432..af4c164af81 100644 --- a/soc/renesas/ra/ra4m3/Kconfig.defconfig +++ b/soc/renesas/ra/ra4m3/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA4M3 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra4w1/Kconfig.defconfig b/soc/renesas/ra/ra4w1/Kconfig.defconfig index 56c1866d0e9..3e3cbb9747c 100644 --- a/soc/renesas/ra/ra4w1/Kconfig.defconfig +++ b/soc/renesas/ra/ra4w1/Kconfig.defconfig @@ -6,4 +6,15 @@ if SOC_SERIES_RA4W1 config NUM_IRQS default 32 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + endif # SOC_SERIES_RA4W1 diff --git a/soc/renesas/ra/ra6e1/Kconfig.defconfig b/soc/renesas/ra/ra6e1/Kconfig.defconfig index 5920c21c759..d8478071e7a 100644 --- a/soc/renesas/ra/ra6e1/Kconfig.defconfig +++ b/soc/renesas/ra/ra6e1/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6E1 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6e2/Kconfig.defconfig b/soc/renesas/ra/ra6e2/Kconfig.defconfig index d19b73b87a0..9d56855abe1 100644 --- a/soc/renesas/ra/ra6e2/Kconfig.defconfig +++ b/soc/renesas/ra/ra6e2/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6E2 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6m1/Kconfig.defconfig b/soc/renesas/ra/ra6m1/Kconfig.defconfig index 520d9aac59e..f863f67d6f2 100644 --- a/soc/renesas/ra/ra6m1/Kconfig.defconfig +++ b/soc/renesas/ra/ra6m1/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6M1 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6m2/Kconfig.defconfig b/soc/renesas/ra/ra6m2/Kconfig.defconfig index ca2dc7346d4..7e5cd7a2eec 100644 --- a/soc/renesas/ra/ra6m2/Kconfig.defconfig +++ b/soc/renesas/ra/ra6m2/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6M2 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6m3/Kconfig.defconfig b/soc/renesas/ra/ra6m3/Kconfig.defconfig index 43f112acb60..ae8951e40c5 100644 --- a/soc/renesas/ra/ra6m3/Kconfig.defconfig +++ b/soc/renesas/ra/ra6m3/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6M3 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6m4/Kconfig.defconfig b/soc/renesas/ra/ra6m4/Kconfig.defconfig index 5352885ee93..7e6de81829e 100644 --- a/soc/renesas/ra/ra6m4/Kconfig.defconfig +++ b/soc/renesas/ra/ra6m4/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6M4 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra6m5/Kconfig.defconfig b/soc/renesas/ra/ra6m5/Kconfig.defconfig index 3e473cd8932..51c5a3c0de2 100644 --- a/soc/renesas/ra/ra6m5/Kconfig.defconfig +++ b/soc/renesas/ra/ra6m5/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA6M5 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,iclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra8d1/Kconfig.defconfig b/soc/renesas/ra/ra8d1/Kconfig.defconfig index e009261b4b6..219dbd2336d 100644 --- a/soc/renesas/ra/ra8d1/Kconfig.defconfig +++ b/soc/renesas/ra/ra8d1/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA8D1 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra8m1/Kconfig.defconfig b/soc/renesas/ra/ra8m1/Kconfig.defconfig index d963468bb07..18f1da7e08d 100644 --- a/soc/renesas/ra/ra8m1/Kconfig.defconfig +++ b/soc/renesas/ra/ra8m1/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA8M1 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128 diff --git a/soc/renesas/ra/ra8t1/Kconfig.defconfig b/soc/renesas/ra/ra8t1/Kconfig.defconfig index 3e721bd8fc3..44acb5cf413 100644 --- a/soc/renesas/ra/ra8t1/Kconfig.defconfig +++ b/soc/renesas/ra/ra8t1/Kconfig.defconfig @@ -6,6 +6,17 @@ if SOC_SERIES_RA8T1 config NUM_IRQS default 96 +DT_ICLK_PATH := $(dt_nodelabel_path,cpuclk) + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency) + +config BUILD_OUTPUT_HEX + default y + +config CLOCK_CONTROL + default y + # Set to the minimal size of data which can be written. config FLASH_FILL_BUFFER_SIZE default 128