clock/usdhc: Enable clock of USDHC of i.MXRT
Enable clock of USDHC of i.MXRT. Add clock interface for USDHC in ccm. Signed-off-by: Jun Yang <jun.yang@nxp.com>
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3 changed files with 32 additions and 0 deletions
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@ -73,6 +73,20 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
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}
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break;
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#ifdef CONFIG_DISK_ACCESS_USDHC1
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case IMX_CCM_USDHC1_CLK:
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*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
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(CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U);
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break;
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#endif
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#ifdef CONFIG_DISK_ACCESS_USDHC2
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case IMX_CCM_USDHC2_CLK:
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*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
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(CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);
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break;
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#endif
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}
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return 0;
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@ -13,5 +13,7 @@
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#define IMX_CCM_LPUART_CLK 3
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#define IMX_CCM_LPI2C_CLK 4
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#define IMX_CCM_LPSPI_CLK 5
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#define IMX_CCM_USDHC1_CLK 6
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#define IMX_CCM_USDHC2_CLK 7
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_H_ */
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@ -185,6 +185,22 @@ static ALWAYS_INLINE void clkInit(void)
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USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
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#endif
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#if defined(CONFIG_DISK_ACCESS_USDHC1) || \
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defined(CONFIG_DISK_ACCESS_USDHC2)
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CLOCK_InitSysPfd(kCLOCK_Pfd0, 0x12U);
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/* Configure USDHC clock source and divider */
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#ifdef CONFIG_DISK_ACCESS_USDHC1
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CLOCK_SetDiv(kCLOCK_Usdhc1Div, 0U);
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CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U);
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CLOCK_EnableClock(kCLOCK_Usdhc1);
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#endif
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#ifdef CONFIG_DISK_ACCESS_USDHC2
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CLOCK_SetDiv(kCLOCK_Usdhc2Div, 0U);
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CLOCK_SetMux(kCLOCK_Usdhc2Mux, 1U);
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CLOCK_EnableClock(kCLOCK_Usdhc2);
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#endif
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#endif
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/* Keep the system clock running so SYSTICK can wake up the system from
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* wfi.
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*/
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