diff --git a/drivers/clock_control/clock_control_mcux_ccm.c b/drivers/clock_control/clock_control_mcux_ccm.c
index e783edfa6d0..04ed92552a7 100644
--- a/drivers/clock_control/clock_control_mcux_ccm.c
+++ b/drivers/clock_control/clock_control_mcux_ccm.c
@@ -73,6 +73,20 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
 		}
 
 		break;
+
+#ifdef CONFIG_DISK_ACCESS_USDHC1
+	case IMX_CCM_USDHC1_CLK:
+		*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
+				(CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U);
+		break;
+#endif
+
+#ifdef CONFIG_DISK_ACCESS_USDHC2
+	case IMX_CCM_USDHC2_CLK:
+		*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
+				(CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);
+		break;
+#endif
 	}
 
 	return 0;
diff --git a/include/dt-bindings/clock/imx_ccm.h b/include/dt-bindings/clock/imx_ccm.h
index 3d97587e7bc..066c7f4881b 100644
--- a/include/dt-bindings/clock/imx_ccm.h
+++ b/include/dt-bindings/clock/imx_ccm.h
@@ -13,5 +13,7 @@
 #define IMX_CCM_LPUART_CLK		3
 #define IMX_CCM_LPI2C_CLK		4
 #define IMX_CCM_LPSPI_CLK		5
+#define IMX_CCM_USDHC1_CLK		6
+#define IMX_CCM_USDHC2_CLK		7
 
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_H_ */
diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c
index 9f95f015da2..d0e4dc5f0ef 100644
--- a/soc/arm/nxp_imx/rt/soc.c
+++ b/soc/arm/nxp_imx/rt/soc.c
@@ -185,6 +185,22 @@ static ALWAYS_INLINE void clkInit(void)
 	USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
 #endif
 
+#if defined(CONFIG_DISK_ACCESS_USDHC1) ||       \
+	defined(CONFIG_DISK_ACCESS_USDHC2)
+	CLOCK_InitSysPfd(kCLOCK_Pfd0, 0x12U);
+	/* Configure USDHC clock source and divider */
+#ifdef CONFIG_DISK_ACCESS_USDHC1
+	CLOCK_SetDiv(kCLOCK_Usdhc1Div, 0U);
+	CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U);
+	CLOCK_EnableClock(kCLOCK_Usdhc1);
+#endif
+#ifdef CONFIG_DISK_ACCESS_USDHC2
+	CLOCK_SetDiv(kCLOCK_Usdhc2Div, 0U);
+	CLOCK_SetMux(kCLOCK_Usdhc2Mux, 1U);
+	CLOCK_EnableClock(kCLOCK_Usdhc2);
+#endif
+#endif
+
 	/* Keep the system clock running so SYSTICK can wake up the system from
 	 * wfi.
 	 */