dts: intel_s1000: enable DTS for GPIO

Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
This commit is contained in:
Sathish Kuttan 2018-11-23 21:49:38 -08:00 committed by Anas Nashif
commit 23f11933b9
4 changed files with 31 additions and 10 deletions

View file

@ -58,4 +58,23 @@
#define DT_SPI_DW_IRQ_FLAGS DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_SENSE
#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_PRIORITY
#define DT_GPIO_DW_0_BASE_ADDR \
DT_SNPS_DESIGNWARE_GPIO_80C00_BASE_ADDRESS
#define DT_GPIO_DW_0_BITS \
DT_SNPS_DESIGNWARE_GPIO_80C00_BITS
#define DT_GPIO_INTC_IRQ \
(DT_SNPS_DESIGNWARE_GPIO_80C00_IRQ_0 << INTR_CNTL_IRQ_NUM_SHIFT)
#define DT_GPIO_CAVS_IRQ \
(DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0 << CAVS_IRQ_NUM_SHIFT)
#define DT_GPIO_XTENSA_IRQ \
(DT_INTEL_CAVS_INTC_78800_IRQ_0 << XTENSA_IRQ_NUM_SHIFT)
#define DT_GPIO_DW_0_IRQ \
(DT_GPIO_INTC_IRQ | DT_GPIO_CAVS_IRQ | DT_GPIO_XTENSA_IRQ)
#define CONFIG_GPIO_DW_0_IRQ_PRI \
DT_SNPS_DESIGNWARE_GPIO_80C00_IRQ_0_PRIORITY
#define DT_GPIO_DW_0_IRQ_FLAGS 0
#define CONFIG_GPIO_DW_0_NAME \
DT_SNPS_DESIGNWARE_GPIO_80C00_LABEL
/* End of SoC Level DTS fixup file */