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arch: arm: stm32l4: Rework pinmux driver

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STM32L4 pinmux handler is reworked to support future pinmux dts
generation.
Preliminary change is done to move pin configuration
informations in a {pin, conf} structure closer to dts fields
"pins" array is removed and information is transferred to
"pinconf" array

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-07-26 18:10:25 +02:00 • committed by Kumar Gala
commit 2366d23573
7 changed files with 156 additions and 300 deletions
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1
arch/arm/soc/st_stm32/stm32l4/Makefile
View file

@ -1,4 +1,3 @@
obj-y += soc.o obj-y += soc.o
obj-$(CONFIG_GPIO) += soc_gpio.o obj-$(CONFIG_GPIO) += soc_gpio.o
obj-$(CONFIG_PINMUX) += soc_pinmux.o

110
arch/arm/soc/st_stm32/stm32l4/soc_gpio.c
View file

@ -20,30 +20,9 @@
#include <device.h> #include <device.h>
#include "soc.h" #include "soc.h"
#include "soc_registers.h" #include "soc_registers.h"
#include "soc_pinmux.h"
#include <gpio.h> #include <gpio.h>
#include <gpio/gpio_stm32.h> #include <gpio/gpio_stm32.h>
enum {
STM32L4X_MODER_INPUT_MODE = 0x0,
STM32L4X_MODER_OUTPUT_MODE = 0x1,
STM32L4X_MODER_ALT_MODE = 0x2,
STM32L4X_MODER_ANALOG_MODE = 0x3,
STM32L4X_MODER_MASK = 0x3,
};
enum {
STM32L4X_OTYPER_PUSH_PULL = 0x0,
STM32L4X_OTYPER_OPEN_DRAIN = 0x1,
STM32L4X_OTYPER_MASK = 0x1,
};
enum {
STM32L4X_PUPDR_NO_PULL = 0x0,
STM32L4X_PUPDR_PULL_UP = 0x1,
STM32L4X_PUPDR_PULL_DOWN = 0x2,
STM32L4X_PUPDR_MASK = 0x3,
};
enum { enum {
STM32L4X_PIN3 = 3, STM32L4X_PIN3 = 3,
@ -70,86 +49,28 @@ struct stm32l4x_gpio {
u32_t ascr; /* Only present on STM32L4x1, STM32L4x5, STM32L4x6 */ u32_t ascr; /* Only present on STM32L4x1, STM32L4x5, STM32L4x6 */
}; };
/**
* @brief map pin function to MODE register value
*/
static u32_t func_to_mode(int conf, unsigned int afnum)
{
/* If an alternate function is specified */
if (afnum) {
return STM32L4X_MODER_ALT_MODE;
}
switch (conf) {
case STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
case STM32L4X_PIN_CONFIG_BIAS_PULL_UP:
case STM32L4X_PIN_CONFIG_BIAS_PULL_DOWN:
return STM32L4X_MODER_INPUT_MODE;
case STM32L4X_PIN_CONFIG_ANALOG:
return STM32L4X_MODER_ANALOG_MODE;
default:
return STM32L4X_MODER_OUTPUT_MODE;
}
return STM32L4X_MODER_INPUT_MODE;
}
static u32_t func_to_otype(int conf)
{
switch (conf) {
case STM32L4X_PIN_CONFIG_OPEN_DRAIN:
case STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_UP:
case STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_DOWN:
return STM32L4X_OTYPER_OPEN_DRAIN;
default:
return STM32L4X_OTYPER_PUSH_PULL;
}
return STM32L4X_OTYPER_PUSH_PULL;
}
static u32_t func_to_pupd(int conf)
{
switch (conf) {
case STM32L4X_PIN_CONFIG_ANALOG:
case STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
case STM32L4X_PIN_CONFIG_PUSH_PULL:
case STM32L4X_PIN_CONFIG_OPEN_DRAIN:
return STM32L4X_PUPDR_NO_PULL;
case STM32L4X_PIN_CONFIG_BIAS_PULL_UP:
case STM32L4X_PIN_CONFIG_PUSH_PULL_PULL_UP:
case STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_UP:
return STM32L4X_PUPDR_PULL_UP;
case STM32L4X_PIN_CONFIG_BIAS_PULL_DOWN:
case STM32L4X_PIN_CONFIG_PUSH_PULL_PULL_DOWN:
case STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_DOWN:
return STM32L4X_PUPDR_PULL_DOWN;
}
return STM32L4X_PUPDR_NO_PULL;
}
int stm32_gpio_flags_to_conf(int flags, int *pincfg) int stm32_gpio_flags_to_conf(int flags, int *pincfg)
{ {
int direction = flags & GPIO_DIR_MASK; int direction = flags & GPIO_DIR_MASK;
int pud = flags & GPIO_PUD_MASK;
if (!pincfg) { if (!pincfg) {
return -EINVAL; return -EINVAL;
} }
if (direction == GPIO_DIR_OUT) { if (direction == GPIO_DIR_OUT) {
*pincfg = STM32L4X_PIN_CONFIG_PUSH_PULL; *pincfg = STM32_MODER_OUTPUT_MODE;
} else { } else {
int pud = flags & GPIO_PUD_MASK;
/* pull-{up,down} maybe? */ /* pull-{up,down} maybe? */
*pincfg = STM32_MODER_INPUT_MODE;
if (pud == GPIO_PUD_PULL_UP) { if (pud == GPIO_PUD_PULL_UP) {
*pincfg = STM32L4X_PIN_CONFIG_BIAS_PULL_UP; *pincfg = *pincfg | STM32_PUPDR_PULL_UP;
} else if (pud == GPIO_PUD_PULL_DOWN) { } else if (pud == GPIO_PUD_PULL_DOWN) {
*pincfg = STM32L4X_PIN_CONFIG_BIAS_PULL_DOWN; *pincfg = *pincfg | STM32_PUPDR_PULL_DOWN;
} else { } else {
/* floating */ /* floating */
*pincfg = STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE; *pincfg = *pincfg | STM32_PUPDR_NO_PULL;
} }
} }
@ -160,26 +81,27 @@ int stm32_gpio_configure(u32_t *base_addr, int pin, int pinconf, int afnum)
{ {
volatile struct stm32l4x_gpio *gpio = volatile struct stm32l4x_gpio *gpio =
(struct stm32l4x_gpio *)(base_addr); (struct stm32l4x_gpio *)(base_addr);
unsigned int mode, otype, pupd; unsigned int mode, otype, ospeed, pupd;
unsigned int pin_shift = pin << 1; unsigned int pin_shift = pin << 1;
unsigned int afr_bank = pin / 8; unsigned int afr_bank = pin / 8;
unsigned int afr_shift = (pin % 8) << 2; unsigned int afr_shift = (pin % 8) << 2;
u32_t scratch; u32_t scratch;
mode = func_to_mode(pinconf, afnum); mode = (pinconf >> STM32_MODER_SHIFT) & STM32_MODER_MASK;
otype = func_to_otype(pinconf); otype = (pinconf >> STM32_OTYPER_SHIFT) & STM32_OTYPER_MASK;
pupd = func_to_pupd(pinconf); ospeed = (pinconf >> STM32_OSPEEDR_SHIFT) & STM32_OSPEEDR_MASK;
pupd = (pinconf >> STM32_PUPDR_SHIFT) & STM32_PUPDR_MASK;
scratch = gpio->moder & ~(STM32L4X_MODER_MASK << pin_shift); scratch = gpio->moder & ~(STM32_MODER_MASK << pin_shift);
gpio->moder = scratch | (mode << pin_shift); gpio->moder = scratch | (mode << pin_shift);
scratch = gpio->otyper & ~(STM32L4X_OTYPER_MASK << pin); scratch = gpio->otyper & ~(STM32_OTYPER_MASK << pin);
gpio->otyper = scratch | (otype << pin); gpio->otyper = scratch | (otype << pin);
scratch = gpio->pupdr & ~(STM32L4X_PUPDR_MASK << pin_shift); scratch = gpio->pupdr & ~(STM32_PUPDR_MASK << pin_shift);
gpio->pupdr = scratch | (pupd << pin_shift); gpio->pupdr = scratch | (pupd << pin_shift);
scratch = gpio->afr[afr_bank] & ~(STM32L4X_AFR_MASK << afr_shift); scratch = gpio->afr[afr_bank] & ~(STM32_AFR_MASK << afr_shift);
gpio->afr[afr_bank] = scratch | (afnum << afr_shift); gpio->afr[afr_bank] = scratch | (afnum << afr_shift);
return 0; return 0;

105
arch/arm/soc/st_stm32/stm32l4/soc_pinmux.c
View file

@ -1,105 +0,0 @@
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copyright (c) 2016 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include "soc.h"
#include "soc_pinmux.h"
#include <device.h>
#include <misc/util.h>
#include <pinmux/stm32/pinmux_stm32.h>
#include <drivers/clock_control/stm32_clock_control.h>
static const stm32_pin_func_t pin_pa9_funcs[] = {
[STM32L4X_PINMUX_FUNC_PA9_USART1_TX - 1] =
STM32L4X_PIN_CONFIG_PUSH_PULL,
};
static const stm32_pin_func_t pin_pa10_funcs[] = {
[STM32L4X_PINMUX_FUNC_PA10_USART1_RX - 1] =
STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
};
static const stm32_pin_func_t pin_pa2_funcs[] = {
[STM32L4X_PINMUX_FUNC_PA2_USART2_TX - 1] =
STM32L4X_PIN_CONFIG_PUSH_PULL,
};
static const stm32_pin_func_t pin_pa3_funcs[] = {
[STM32L4X_PINMUX_FUNC_PA3_USART2_RX - 1] =
STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
};
static const stm32_pin_func_t pin_pb6_funcs[] = {
[STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL - 1] =
STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_UP,
[STM32L4X_PINMUX_FUNC_PB6_USART1_TX - 1] =
STM32L4X_PIN_CONFIG_PUSH_PULL,
};
static const stm32_pin_func_t pin_pb7_funcs[] = {
[STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA - 1] =
STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_UP,
[STM32L4X_PINMUX_FUNC_PB7_USART1_RX - 1] =
STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
};
static const stm32_pin_func_t pin_pb10_funcs[] = {
[STM32L4X_PINMUX_FUNC_PB10_USART3_TX - 1] =
STM32L4X_PIN_CONFIG_PUSH_PULL,
};
static const stm32_pin_func_t pin_pb11_funcs[] = {
[STM32L4X_PINMUX_FUNC_PB11_USART3_RX - 1] =
STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
};
static const stm32_pin_func_t pin_pa0_funcs[] = {
[STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1 - 1] =
STM32L4X_PIN_CONFIG_PUSH_PULL,
};
/**
* @brief pin configuration
*/
static const struct stm32_pinmux_conf pins[] = {
STM32_PIN_CONF(STM32_PIN_PA0, pin_pa0_funcs),
STM32_PIN_CONF(STM32_PIN_PA2, pin_pa2_funcs),
STM32_PIN_CONF(STM32_PIN_PA3, pin_pa3_funcs),
STM32_PIN_CONF(STM32_PIN_PA9, pin_pa9_funcs),
STM32_PIN_CONF(STM32_PIN_PA10, pin_pa10_funcs),
STM32_PIN_CONF(STM32_PIN_PB6, pin_pb6_funcs),
STM32_PIN_CONF(STM32_PIN_PB7, pin_pb7_funcs),
STM32_PIN_CONF(STM32_PIN_PB10, pin_pb10_funcs),
STM32_PIN_CONF(STM32_PIN_PB11, pin_pb11_funcs),
};
int stm32_get_pin_config(int pin, int func)
{
/* GPIO function is always available, to save space it is not
* listed in alternate functions array
*/
if (func == STM32_PINMUX_FUNC_GPIO) {
return STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE;
}
/* analog function is another 'known' setting */
if (func == STM32_PINMUX_FUNC_ANALOG) {
return STM32L4X_PIN_CONFIG_ANALOG;
}
for (int i = 0; i < ARRAY_SIZE(pins); i++) {
if (pins[i].pin == pin) {
if ((func - 1) >= pins[i].nfuncs) {
return -EINVAL;
}
return pins[i].funcs[func - 1];
}
}
return -EINVAL;
}

25
arch/arm/soc/st_stm32/stm32l4/soc_pinmux.h
View file

@ -1,25 +0,0 @@
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copyright (c) 2016 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _STM32L4X_SOC_PINMUX_H_
#define _STM32L4X_SOC_PINMUX_H_
/* IO pin functions */
enum stm32l4x_pin_config_mode {
STM32L4X_PIN_CONFIG_BIAS_HIGH_IMPEDANCE = 0,
STM32L4X_PIN_CONFIG_BIAS_PULL_UP,
STM32L4X_PIN_CONFIG_BIAS_PULL_DOWN,
STM32L4X_PIN_CONFIG_ANALOG,
STM32L4X_PIN_CONFIG_OPEN_DRAIN,
STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_UP,
STM32L4X_PIN_CONFIG_OPEN_DRAIN_PULL_DOWN,
STM32L4X_PIN_CONFIG_PUSH_PULL,
STM32L4X_PIN_CONFIG_PUSH_PULL_PULL_UP,
STM32L4X_PIN_CONFIG_PUSH_PULL_PULL_DOWN,
};
#endif /* _STM32L4X_SOC_PINMUX_H_ */

12
drivers/pinmux/stm32/pinmux_stm32.c
View file

@ -92,20 +92,23 @@ static int stm32_pin_configure(int pin, int func, int altf)
int _pinmux_stm32_set(u32_t pin, u32_t func, int _pinmux_stm32_set(u32_t pin, u32_t func,
struct device *clk) struct device *clk)
{ {
int config;
/* make sure to enable port clock first */ /* make sure to enable port clock first */
if (enable_port(STM32_PORT(pin), clk)) { if (enable_port(STM32_PORT(pin), clk)) {
return -EIO; return -EIO;
} }
#ifdef CONFIG_SOC_SERIES_STM32L4X
return stm32_pin_configure(pin, func, func & STM32_AFR_MASK);
#else
/* determine config for alternate function */ /* determine config for alternate function */
config = stm32_get_pin_config(pin, func); int config = stm32_get_pin_config(pin, func);
if (config < 0) { if (config < 0) {
return config; return config;
} }
return stm32_pin_configure(pin, config, func); return stm32_pin_configure(pin, config, func);
#endif /* CONFIG_SOC_SERIES_STM32L4X */
} }
/** /**
@ -124,6 +127,7 @@ void stm32_setup_pins(const struct pin_config *pinconf,
for (i = 0; i < pins; i++) { for (i = 0; i < pins; i++) {
_pinmux_stm32_set(pinconf[i].pin_num, _pinmux_stm32_set(pinconf[i].pin_num,
pinconf[i].mode, clk); pinconf[i].mode,
clk);
} }
} }

105
drivers/pinmux/stm32/pinmux_stm32.h
View file

@ -16,6 +16,58 @@
#include <clock_control.h> #include <clock_control.h>
#include "pinmux/pinmux.h" #include "pinmux/pinmux.h"
/**
* @brief PIN configuration bitfield
*
* Pin configuration is coded with the following
* fields
* Alternate Function [ 0 : 7 ]
* GPIO Mode [ 8 : 9 ]
* GPIO Output type [ 10 ]
* GPIO Speed [ 11 : 12 ]
* GPIO PUPD config [ 13 : 14 ]
*
* Applicable to STM32F3, STM32F4, STM32L4 series
*/
#define STM32_AFR_MASK 0xF
/* GPIO Mode */
#define STM32_MODER_INPUT_MODE (0x0<<STM32_MODER_SHIFT)
#define STM32_MODER_OUTPUT_MODE (0x1<<STM32_MODER_SHIFT)
#define STM32_MODER_ALT_MODE (0x2<<STM32_MODER_SHIFT)
#define STM32_MODER_ANALOG_MODE (0x3<<STM32_MODER_SHIFT)
#define STM32_MODER_MASK 0x3
#define STM32_MODER_SHIFT 4
/* GPIO Output type */
#define STM32_OTYPER_PUSH_PULL (0x0<<STM32_OTYPER_SHIFT)
#define STM32_OTYPER_OPEN_DRAIN (0x1<<STM32_OTYPER_SHIFT)
#define STM32_OTYPER_MASK 0x1
#define STM32_OTYPER_SHIFT 6
/* GPIO speed */
#define STM32_OSPEEDR_LOW_SPEED (0x0<<STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MEDIUM_SPEED (0x1<<STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_HIGH_SPEED (0x2<<STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_VERY_HIGH_SPEED (0x3<<STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MASK 0x3
#define STM32_OSPEEDR_SHIFT 7
/* GPIO High impedance/Pull-up/pull-down */
#define STM32_PUPDR_NO_PULL (0x0<<STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_UP (0x1<<STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_DOWN (0x2<<STM32_PUPDR_SHIFT)
#define STM32_PUPDR_MASK 0x3
#define STM32_PUPDR_SHIFT 9
/* Add usefull defines */
#define STM32_PUSHPULL_NOPULL (STM32_OTYPER_PUSH_PULL | \
STM32_PUPDR_NO_PULL)
#define STM32_OPENDRAIN_PULLUP (STM32_OTYPER_OPEN_DRAIN | \
STM32_PUPDR_PULL_UP)
/** /**
* @brief numerical IDs for IO ports * @brief numerical IDs for IO ports
*/ */
@ -44,26 +96,43 @@ enum stm32_pin_port {
/* /*
*/ */
enum stm32_pin_alt_func { enum stm32_pin_alt_func {
STM32_PINMUX_FUNC_ALT_0 = 0, /* GPIO */ STM32_FUNC_ALT_0 = 0, /* GPIO */
STM32_PINMUX_FUNC_ALT_1, STM32_FUNC_ALT_1,
STM32_PINMUX_FUNC_ALT_2, STM32_FUNC_ALT_2,
STM32_PINMUX_FUNC_ALT_3, STM32_FUNC_ALT_3,
STM32_PINMUX_FUNC_ALT_4, STM32_FUNC_ALT_4,
STM32_PINMUX_FUNC_ALT_5, STM32_FUNC_ALT_5,
STM32_PINMUX_FUNC_ALT_6, STM32_FUNC_ALT_6,
STM32_PINMUX_FUNC_ALT_7, STM32_FUNC_ALT_7,
STM32_PINMUX_FUNC_ALT_8, STM32_FUNC_ALT_8,
STM32_PINMUX_FUNC_ALT_9, STM32_FUNC_ALT_9,
STM32_PINMUX_FUNC_ALT_10, STM32_FUNC_ALT_10,
STM32_PINMUX_FUNC_ALT_11, STM32_FUNC_ALT_11,
STM32_PINMUX_FUNC_ALT_12, STM32_FUNC_ALT_12,
STM32_PINMUX_FUNC_ALT_13, STM32_FUNC_ALT_13,
STM32_PINMUX_FUNC_ALT_14, STM32_FUNC_ALT_14,
STM32_PINMUX_FUNC_ALT_15, STM32_FUNC_ALT_15,
STM32_PINMUX_FUNC_ALT_16, STM32_FUNC_ALT_16,
STM32_PINMUX_FUNC_ALT_MAX STM32_FUNC_ALT_MAX
}; };
#define STM32_PINMUX_ALT_FUNC_0 (STM32_FUNC_ALT_0 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_1 (STM32_FUNC_ALT_1 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_2 (STM32_FUNC_ALT_2 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_3 (STM32_FUNC_ALT_3 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_4 (STM32_FUNC_ALT_4 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_5 (STM32_FUNC_ALT_5 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_6 (STM32_FUNC_ALT_6 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_7 (STM32_FUNC_ALT_7 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_8 (STM32_FUNC_ALT_8 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_9 (STM32_FUNC_ALT_9 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_10 (STM32_FUNC_ALT_10 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_11 (STM32_FUNC_ALT_11 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_12 (STM32_FUNC_ALT_12 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_13 (STM32_FUNC_ALT_13 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_14 (STM32_FUNC_ALT_14 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_15 (STM32_FUNC_ALT_15 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_FUNC_GPIO 0 #define STM32_PINMUX_FUNC_GPIO 0
#define STM32_PINMUX_FUNC_ANALOG (STM32_PINMUX_FUNC_ALT_MAX) #define STM32_PINMUX_FUNC_ANALOG (STM32_PINMUX_FUNC_ALT_MAX)

98
drivers/pinmux/stm32/pinmux_stm32l4x.h
View file

@ -13,68 +13,60 @@
*/ */
/* Port A */ /* Port A */
#define STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1 STM32_PINMUX_FUNC_ALT_1 #define STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1 STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA2_USART2_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PA2_USART2_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA3_USART2_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PA3_USART2_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA9_USART1_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PA9_USART1_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA10_USART1_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PA10_USART1_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1 STM32_PINMUX_FUNC_ALT_1 #define STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1 STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PA15_USART2_RX STM32_PINMUX_FUNC_ALT_3 #define STM32L4X_PINMUX_FUNC_PA15_USART2_RX STM32_PINMUX_ALT_FUNC_3 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS STM32_PINMUX_FUNC_ALT_6
/* Port B */ /* Port B */
#define STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB3_SPI3_SCK STM32_PINMUX_FUNC_ALT_6 #define STM32L4X_PINMUX_FUNC_PB3_SPI3_SCK STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB4_SPI3_MISO STM32_PINMUX_FUNC_ALT_6 #define STM32L4X_PINMUX_FUNC_PB4_SPI3_MISO STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB5_SPI3_MOSI STM32_PINMUX_FUNC_ALT_6 #define STM32L4X_PINMUX_FUNC_PB5_SPI3_MOSI STM32_PINMUX_ALT_FUNC_6 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB6_USART1_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PB6_USART1_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB7_USART1_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PB7_USART1_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB10_USART3_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PB10_USART3_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB11_USART3_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PB11_USART3_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS STM32_PINMUX_FUNC_ALT_5 #define STM32L4X_PINMUX_FUNC_PB13_I2C2_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB13_I2C2_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PB14_I2C2_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK STM32_PINMUX_FUNC_ALT_5
#define STM32L4X_PINMUX_FUNC_PB14_I2C2_SDA STM32_PINMUX_FUNC_ALT_4
#define STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO STM32_PINMUX_FUNC_ALT_5
#define STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI STM32_PINMUX_FUNC_ALT_5
/* Port C */ /* Port C */
#define STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PC4_USART3_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PC4_USART3_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PC5_USART3_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PC5_USART3_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK STM32_PINMUX_FUNC_ALT_6 #define STM32L4X_PINMUX_FUNC_PC10_USART3_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PC10_USART3_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PC11_USART3_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO STM32_PINMUX_FUNC_ALT_6
#define STM32L4X_PINMUX_FUNC_PC11_USART3_RX STM32_PINMUX_FUNC_ALT_7
#define STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI STM32_PINMUX_FUNC_ALT_6
/* Port D */ /* Port D */
#define STM32L4X_PINMUX_FUNC_PD5_USART2_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PD5_USART2_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PD6_USART2_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PD6_USART2_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PD8_USART3_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PD8_USART3_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PD9_USART3_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PD9_USART3_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
/* Port F */ /* Port F */
#define STM32L4X_PINMUX_FUNC_PF1_I2C3_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PF1_I2C3_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PF0_I2C3_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PF0_I2C3_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
/* Port G */ /* Port G */
#define STM32L4X_PINMUX_FUNC_PG7_I2C3_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PG7_I2C3_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PG8_I2C3_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PG8_I2C3_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PG9_USART1_TX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PG9_USART1_TX STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL
#define STM32L4X_PINMUX_FUNC_PG10_USART1_RX STM32_PINMUX_FUNC_ALT_7 #define STM32L4X_PINMUX_FUNC_PG10_USART1_RX STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL
#define STM32L4X_PINMUX_FUNC_PG14_I2C1_SCL STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PG14_I2C1_SCL STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#define STM32L4X_PINMUX_FUNC_PG13_I2C1_SDA STM32_PINMUX_FUNC_ALT_4 #define STM32L4X_PINMUX_FUNC_PG13_I2C1_SDA STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP
#endif /* _STM32L4X_PINMUX_H_ */ #endif /* _STM32L4X_PINMUX_H_ */