diff --git a/dts/arm/armv6-m.dtsi b/dts/arm/armv6-m.dtsi
index cdf25c7d348..3060da5adc1 100644
--- a/dts/arm/armv6-m.dtsi
+++ b/dts/arm/armv6-m.dtsi
@@ -9,7 +9,7 @@
 		ranges;
 
 		nvic: interrupt-controller@e000e100  {
-			compatible = "arm,nvic";
+			compatible = "arm,v6m-nvic";
 			reg = <0xe000e100 0xc00>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
diff --git a/dts/arm/armv7-m.dtsi b/dts/arm/armv7-m.dtsi
index 9937ad43597..8ad68d2fd6a 100644
--- a/dts/arm/armv7-m.dtsi
+++ b/dts/arm/armv7-m.dtsi
@@ -9,7 +9,7 @@
 		ranges;
 
 		nvic: interrupt-controller@e000e100  {
-			compatible = "arm,nvic";
+			compatible = "arm,v7m-nvic";
 			reg = <0xe000e100 0xc00>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
diff --git a/dts/arm/cc3200_launchxl.fixup b/dts/arm/cc3200_launchxl.fixup
index 1dea2fa9aaa..af1312e9de4 100644
--- a/dts/arm/cc3200_launchxl.fixup
+++ b/dts/arm/cc3200_launchxl.fixup
@@ -1 +1 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
diff --git a/dts/arm/frdm_k64f.fixup b/dts/arm/frdm_k64f.fixup
index 9be8d392beb..d2e90c53c5d 100644
--- a/dts/arm/frdm_k64f.fixup
+++ b/dts/arm/frdm_k64f.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CONFIG_UART_MCUX_0_BAUD_RATE	NXP_K64F_UART_4006A000_BAUD_RATE
 #define CONFIG_UART_MCUX_0_IRQ_PRI	NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
diff --git a/dts/arm/frdm_kw41z.fixup b/dts/arm/frdm_kw41z.fixup
index 489ff817876..337f5f42452 100644
--- a/dts/arm/frdm_kw41z.fixup
+++ b/dts/arm/frdm_kw41z.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS		ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS		ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE	NXP_KW41Z_LPUART_40054000_BAUD_RATE
 #define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI	NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY
diff --git a/dts/arm/hexiwear_k64.fixup b/dts/arm/hexiwear_k64.fixup
index 9be8d392beb..d2e90c53c5d 100644
--- a/dts/arm/hexiwear_k64.fixup
+++ b/dts/arm/hexiwear_k64.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CONFIG_UART_MCUX_0_BAUD_RATE	NXP_K64F_UART_4006A000_BAUD_RATE
 #define CONFIG_UART_MCUX_0_IRQ_PRI	NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
diff --git a/dts/arm/nucleo_l476rg.fixup b/dts/arm/nucleo_l476rg.fixup
index f90c1577e57..410a78c5bdd 100644
--- a/dts/arm/nucleo_l476rg.fixup
+++ b/dts/arm/nucleo_l476rg.fixup
@@ -4,7 +4,7 @@
  * generated data matches the driver definitions.
  */
 
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
 #define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_BAUD_RATE
diff --git a/dts/arm/olimexino_stm32.fixup b/dts/arm/olimexino_stm32.fixup
index d1e7728e725..b3ac22140fd 100644
--- a/dts/arm/olimexino_stm32.fixup
+++ b/dts/arm/olimexino_stm32.fixup
@@ -5,7 +5,7 @@
  */
 
 
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
 #define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_BAUD_RATE
diff --git a/dts/arm/v2m_beetle.fixup b/dts/arm/v2m_beetle.fixup
index 1520ad9240c..44f0b70cf8d 100644
--- a/dts/arm/v2m_beetle.fixup
+++ b/dts/arm/v2m_beetle.fixup
@@ -1,4 +1,4 @@
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
 
 #define CMSDK_APB_UART_0_IRQ			ARM_CMSDK_UART_40004000_IRQ_0
 #define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI	ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
diff --git a/dts/arm/yaml/arm,nvic.yaml b/dts/arm/yaml/arm,nvic.yaml
deleted file mode 100644
index 4efbabefedc..00000000000
--- a/dts/arm/yaml/arm,nvic.yaml
+++ /dev/null
@@ -1,32 +0,0 @@
----
-title: ARM Cortex-M NVIC Interrupt Controller
-version: 0.1
-
-description: >
-    This binding describes the ARM Cortex-M NVIC IRQ controller
-
-properties:
-  - compatible:
-      category: required
-      type: string
-      description: compatible strings
-      constraint: "arm,nvic"
-
-  - reg:
-      category: required
-      type: int
-      description: mmio register space
-      generation: define
-
-  - arm,num-irq-priority-bits:
-      category: required
-      type: int
-      description: number of bits of IRQ priorities
-      generation: define
-
-cell_string: IRQ
-
-"#cells":
-  - irq
-  - priority
-...