dts: Generate Kinetis pwm settings from device tree
Adds common and Kinetis-specific pwm device tree properties, and updates the k64 SoC and board dts files to include all four pwm nodes. Jira: ZEP-2025 Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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7 changed files with 113 additions and 8 deletions
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@ -9,6 +9,10 @@
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aliases {
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aliases {
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adc_0 = &adc0;
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adc_0 = &adc0;
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adc_1 = &adc1;
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adc_1 = &adc1;
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pwm_0 = &pwm0;
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pwm_1 = &pwm1;
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pwm_2 = &pwm2;
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pwm_3 = &pwm3;
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uart_0 = &uart0;
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uart_0 = &uart0;
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uart_3 = &uart3;
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uart_3 = &uart3;
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pinmux_a = &pinmux_a;
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pinmux_a = &pinmux_a;
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@ -49,6 +53,10 @@
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status = "ok";
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status = "ok";
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};
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};
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&pwm3 {
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status = "ok";
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};
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&uart0 {
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&uart0 {
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status = "ok";
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status = "ok";
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current-speed = <115200>;
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current-speed = <115200>;
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@ -52,6 +52,11 @@
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS_0
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#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0
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#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY
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#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL
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#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0
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#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0
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@ -9,6 +9,10 @@
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aliases {
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aliases {
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adc_0 = &adc0;
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adc_0 = &adc0;
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adc_1 = &adc1;
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adc_1 = &adc1;
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pwm_0 = &pwm0;
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pwm_1 = &pwm1;
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pwm_2 = &pwm2;
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pwm_3 = &pwm3;
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uart_0 = &uart0;
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uart_0 = &uart0;
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uart_4 = &uart4;
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uart_4 = &uart4;
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pinmux_a = &pinmux_a;
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pinmux_a = &pinmux_a;
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@ -45,6 +49,10 @@
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status = "ok";
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status = "ok";
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};
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};
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&pwm3 {
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status = "ok";
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};
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&i2c0 {
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&i2c0 {
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status = "ok";
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status = "ok";
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};
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};
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@ -52,6 +52,11 @@
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS_0
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#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0
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#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY
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#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL
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#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_MAX30101_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_MAX30101_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0
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#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0
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@ -293,21 +293,39 @@
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};
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};
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pwm0: pwm@40038000{
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pwm0: pwm@40038000{
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compatible = "nxp,k64f-pwm";
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compatible = "nxp,kinetis-ftm";
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reg = <0x40038000 0x98>;
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reg = <0x40038000 0x98>;
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prescaler = <2>;
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interrupts = <42 0>;
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period = <1000>;
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label = "PWM_0";
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clock-source = <0>;
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/* channel information needed - fixme */
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/* channel information needed - fixme */
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status = "disabled";
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};
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};
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pwm1: pwm@40039000{
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pwm1: pwm@40039000{
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compatible = "nxp,k64f-pwm";
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compatible = "nxp,kinetis-ftm";
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reg = <0x40039000 0x98>;
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reg = <0x40039000 0x98>;
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prescaler = <2>;
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interrupts = <43 0>;
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period = <1000>;
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label = "PWM_1";
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clock-source = <0>;
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/* channel information needed - fixme */
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/* channel information needed - fixme */
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status = "disabled";
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};
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pwm2: pwm@4003a000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x4003a000 0x98>;
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interrupts = <43 0>;
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label = "PWM_2";
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/* channel information needed - fixme */
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status = "disabled";
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};
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pwm3: pwm@400b9000{
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compatible = "nxp,kinetis-ftm";
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reg = <0x400b9000 0x98>;
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interrupts = <71 0>;
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label = "PWM_3";
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/* channel information needed - fixme */
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status = "disabled";
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};
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};
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adc0: adc@4003b000{
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adc0: adc@4003b000{
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35
dts/arm/yaml/nxp,kinetis-ftm.yaml
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35
dts/arm/yaml/nxp,kinetis-ftm.yaml
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@ -0,0 +1,35 @@
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: Kinetis FTM
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id: nxp,kinetis-ftm
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version: 0.1
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description: >
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This binding gives a base representation of the Kinetis FTM
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inherits:
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- !include pwm.yaml
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properties:
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- compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "nxp,kinetis-ftm"
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- reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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- interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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...
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26
dts/common/yaml/pwm.yaml
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26
dts/common/yaml/pwm.yaml
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: PWM Base Structure
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id: pwm
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version: 0.1
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description: >
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This binding gives the base structures for all PWM devices
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properties:
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- clocks:
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type: array
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category: required
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description: Clock gate information
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generation: define
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- label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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...
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