From 21e034af14bf8cffd229eb7cd87f92e6dfab6cfd Mon Sep 17 00:00:00 2001 From: Maureen Helm Date: Mon, 17 Jul 2017 14:41:01 -0500 Subject: [PATCH] dts: Generate Kinetis pwm settings from device tree Adds common and Kinetis-specific pwm device tree properties, and updates the k64 SoC and board dts files to include all four pwm nodes. Jira: ZEP-2025 Signed-off-by: Maureen Helm --- dts/arm/frdm_k64f.dts | 8 +++++++ dts/arm/frdm_k64f.fixup | 5 +++++ dts/arm/hexiwear_k64.dts | 8 +++++++ dts/arm/hexiwear_k64.fixup | 5 +++++ dts/arm/nxp/nxp_k6x.dtsi | 34 +++++++++++++++++++++++------- dts/arm/yaml/nxp,kinetis-ftm.yaml | 35 +++++++++++++++++++++++++++++++ dts/common/yaml/pwm.yaml | 26 +++++++++++++++++++++++ 7 files changed, 113 insertions(+), 8 deletions(-) create mode 100644 dts/arm/yaml/nxp,kinetis-ftm.yaml create mode 100644 dts/common/yaml/pwm.yaml diff --git a/dts/arm/frdm_k64f.dts b/dts/arm/frdm_k64f.dts index 182e34d265a..cadef20a408 100644 --- a/dts/arm/frdm_k64f.dts +++ b/dts/arm/frdm_k64f.dts @@ -9,6 +9,10 @@ aliases { adc_0 = &adc0; adc_1 = &adc1; + pwm_0 = &pwm0; + pwm_1 = &pwm1; + pwm_2 = &pwm2; + pwm_3 = &pwm3; uart_0 = &uart0; uart_3 = &uart3; pinmux_a = &pinmux_a; @@ -49,6 +53,10 @@ status = "ok"; }; +&pwm3 { + status = "ok"; +}; + &uart0 { status = "ok"; current-speed = <115200>; diff --git a/dts/arm/frdm_k64f.fixup b/dts/arm/frdm_k64f.fixup index d4e233fea14..299af2b4cc8 100644 --- a/dts/arm/frdm_k64f.fixup +++ b/dts/arm/frdm_k64f.fixup @@ -52,6 +52,11 @@ #define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY #define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL +#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS_0 +#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0 +#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY +#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL + #define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0 diff --git a/dts/arm/hexiwear_k64.dts b/dts/arm/hexiwear_k64.dts index 401e526690e..954482b6af8 100644 --- a/dts/arm/hexiwear_k64.dts +++ b/dts/arm/hexiwear_k64.dts @@ -9,6 +9,10 @@ aliases { adc_0 = &adc0; adc_1 = &adc1; + pwm_0 = &pwm0; + pwm_1 = &pwm1; + pwm_2 = &pwm2; + pwm_3 = &pwm3; uart_0 = &uart0; uart_4 = &uart4; pinmux_a = &pinmux_a; @@ -45,6 +49,10 @@ status = "ok"; }; +&pwm3 { + status = "ok"; +}; + &i2c0 { status = "ok"; }; diff --git a/dts/arm/hexiwear_k64.fixup b/dts/arm/hexiwear_k64.fixup index acc3c725cc9..1c02c519c32 100644 --- a/dts/arm/hexiwear_k64.fixup +++ b/dts/arm/hexiwear_k64.fixup @@ -52,6 +52,11 @@ #define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY #define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL +#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS_0 +#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0 +#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY +#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL + #define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_MAX30101_I2C_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS_0 diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index 0492ef2574f..add32dbdc51 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -293,21 +293,39 @@ }; pwm0: pwm@40038000{ - compatible = "nxp,k64f-pwm"; + compatible = "nxp,kinetis-ftm"; reg = <0x40038000 0x98>; - prescaler = <2>; - period = <1000>; - clock-source = <0>; + interrupts = <42 0>; + label = "PWM_0"; /* channel information needed - fixme */ + status = "disabled"; }; pwm1: pwm@40039000{ - compatible = "nxp,k64f-pwm"; + compatible = "nxp,kinetis-ftm"; reg = <0x40039000 0x98>; - prescaler = <2>; - period = <1000>; - clock-source = <0>; + interrupts = <43 0>; + label = "PWM_1"; /* channel information needed - fixme */ + status = "disabled"; + }; + + pwm2: pwm@4003a000{ + compatible = "nxp,kinetis-ftm"; + reg = <0x4003a000 0x98>; + interrupts = <43 0>; + label = "PWM_2"; + /* channel information needed - fixme */ + status = "disabled"; + }; + + pwm3: pwm@400b9000{ + compatible = "nxp,kinetis-ftm"; + reg = <0x400b9000 0x98>; + interrupts = <71 0>; + label = "PWM_3"; + /* channel information needed - fixme */ + status = "disabled"; }; adc0: adc@4003b000{ diff --git a/dts/arm/yaml/nxp,kinetis-ftm.yaml b/dts/arm/yaml/nxp,kinetis-ftm.yaml new file mode 100644 index 00000000000..0661a4fffe2 --- /dev/null +++ b/dts/arm/yaml/nxp,kinetis-ftm.yaml @@ -0,0 +1,35 @@ +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: Kinetis FTM +id: nxp,kinetis-ftm +version: 0.1 + +description: > + This binding gives a base representation of the Kinetis FTM + +inherits: + - !include pwm.yaml + +properties: + - compatible: + type: string + category: required + description: compatible strings + constraint: "nxp,kinetis-ftm" + + - reg: + type: array + description: mmio register space + generation: define + category: required + + - interrupts: + type: array + category: required + description: required interrupts + generation: define +... diff --git a/dts/common/yaml/pwm.yaml b/dts/common/yaml/pwm.yaml new file mode 100644 index 00000000000..3f99fde62cb --- /dev/null +++ b/dts/common/yaml/pwm.yaml @@ -0,0 +1,26 @@ +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: PWM Base Structure +id: pwm +version: 0.1 + +description: > + This binding gives the base structures for all PWM devices + +properties: + - clocks: + type: array + category: required + description: Clock gate information + generation: define + + - label: + type: string + category: required + description: Human readable string describing the device (used by Zephyr for API name) + generation: define +...