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stm32f4: Update flash to support higher sysclock frequencies

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stm32f411re SoC could run at system clock above 84MHz.
This was not taken into account in __setup_flash function which configure
flash latency depending on system clock. This is now corrected.
Assert added to ease error detection.


Change-Id: I49b92256d611ef464171fb1d8812a4c4d3c27ab8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-01-02 14:06:36 +01:00 • committed by Kumar Gala
commit 219a1e7f0b
1 changed files with 17 additions and 1 deletions
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18
arch/arm/soc/st_stm32/stm32f4/flash_registers.h
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@ -72,14 +72,30 @@ static inline void __setup_flash(void)
if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 30000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_0;
} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 60000000) {
}
#ifdef CONFIG_SOC_STM32F401XE
else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 60000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_1;
} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 84000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_2;
}
#elif CONFIG_SOC_STM32F411XE
else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 64000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_1;
} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 90000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_2;
} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 100000000) {
regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_3;
}
#else
else {
__ASSERT(0, "Flash latency not set");
}
#endif
/* Make sure latency was set */
tmpreg = regs->acr.bit.latency;
}
#endif /* _STM32F4X_FLASHREGISTERS_H_ */