stm32f4: Update flash to support higher sysclock frequencies
stm32f411re SoC could run at system clock above 84MHz. This was not taken into account in __setup_flash function which configure flash latency depending on system clock. This is now corrected. Assert added to ease error detection. Change-Id: I49b92256d611ef464171fb1d8812a4c4d3c27ab8 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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1 changed files with 17 additions and 1 deletions
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@ -72,14 +72,30 @@ static inline void __setup_flash(void)
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if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 30000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_0;
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} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 60000000) {
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}
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#ifdef CONFIG_SOC_STM32F401XE
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else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 60000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_1;
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} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 84000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_2;
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}
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#elif CONFIG_SOC_STM32F411XE
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else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 64000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_1;
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} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 90000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_2;
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} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 100000000) {
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regs->acr.bit.latency = STM32F4X_FLASH_LATENCY_3;
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}
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#else
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else {
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__ASSERT(0, "Flash latency not set");
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}
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#endif
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/* Make sure latency was set */
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tmpreg = regs->acr.bit.latency;
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}
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#endif /* _STM32F4X_FLASHREGISTERS_H_ */
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