intel_s1000: define memctl_default.S and memerror-vector.S files

Define memctl_default.S and memerror-vector.S files. A reference
could be found in the Xtensa toolchain directories. These are
required for using cavs21_LX6HiFi3_RF3_WB16 Xtensa CPU mainly in
simulator. On boards which have ROM, these would have been already
defined in the ROM. Hence, the contents of these files will be
developed at a later time if required.

Change-Id: Idf52397bb6880c136525e69f47e09defcba7f036
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

arch/xtensa/core/startup/CMakeLists.txt

@@ -9,5 +9,7 @@ if(CONFIG_XTENSA_RESET_VECTOR)
 
   zephyr_library_sources(
 	reset-vector.S
+	memerror-vector.S
+	memctl_default.S
     )
 endif()

arch/xtensa/core/startup/memctl_default.S

@@ -0,0 +1,42 @@
+// memctl_default.S  - Default startup value for MEMCTL register.
+
+// Copyright (c) 1998-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+#include <xtensa/coreasm.h>
+#include <xtensa/config/system.h>
+
+
+// This file just contains this one symbol, used by the reset code.
+// It is here rather than in reset-vector.S because we want the symbol
+// to be external, so resolution is delayed until link time.
+//
+// To define your own value to override this default, redefine the
+// symbol __memctl_default to the desired value, e.g. -
+//
+//    xt-xcc test.c -g -o test -Wl,--defsym=__memctl_default=0x08080808
+//
+
+	.global	__memctl_default
+	.weak   __memctl_default
+	.equ    __memctl_default, XCHAL_CACHE_MEMCTL_DEFAULT
+

arch/xtensa/core/startup/memerror-vector.S

@@ -0,0 +1,44 @@
+/* memerror-vector.S  --  Memory Error Exception Vector and Handler */
+
+/* $Id: //depot/rel/Foxhill/dot.5/Xtensa/OS/xtos/memerror-vector.S#1 $ */
+
+/*
+ * Copyright (c) 2006-2013 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <xtensa/coreasm.h>
+#include <xtensa/corebits.h>
+
+// This file just contains this one symbol, used by the reset code.
+// It is here rather than in reset-vector.S because we want the symbol
+// to be external, so resolution is delayed until link time.
+//
+// To define your own value to override this default, redefine the
+// symbol _MemErrorHandler to the desired value, e.g. -
+//
+//    xt-xcc test.c -g -o test -Wl,--defsym=_MemErrorHandler=0x08080808
+//
+
+	.global	_MemErrorHandler
+	.weak   _MemErrorHandler
+	.equ    _MemErrorHandler, XCHAL_CACHE_MEMCTL_DEFAULT
+