soc: silabs_exx32: Add support for EFR32FG13P SoC
This commit adds support for Silicon Labs EFR32FG13P (Flex Gecko) SoC. Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
This commit is contained in:
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11 changed files with 189 additions and 2 deletions
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@ -335,10 +335,12 @@
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/dts/arm/silabs/efm32gg11b* @oanerer
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/dts/arm/silabs/efm32gg11b* @oanerer
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/dts/arm/silabs/efm32_jg_pg* @chrta
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/dts/arm/silabs/efm32_jg_pg* @chrta
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/dts/arm/silabs/efr32bg13p* @mnkp
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/dts/arm/silabs/efr32bg13p* @mnkp
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/dts/arm/silabs/efr32xg13p* @mnkp
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/dts/arm/silabs/efm32jg12b* @chrta
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/dts/arm/silabs/efm32jg12b* @chrta
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/dts/arm/silabs/efm32pg12b* @chrta
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/dts/arm/silabs/efm32pg12b* @chrta
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/dts/arm/silabs/efm32pg1b* @rdmeneze
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/dts/arm/silabs/efm32pg1b* @rdmeneze
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/dts/arm/silabs/efr32mg21* @l-alfred
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/dts/arm/silabs/efr32mg21* @l-alfred
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/dts/arm/silabs/efr32fg13* @yonsch
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/dts/riscv/ @kgugala @pgielda
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/dts/riscv/ @kgugala @pgielda
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/dts/riscv/it8xxx2.dtsi @ite
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/dts/riscv/it8xxx2.dtsi @ite
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/dts/riscv/microsemi-miv.dtsi @galak
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/dts/riscv/microsemi-miv.dtsi @galak
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@ -5,7 +5,7 @@
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*/
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*/
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#include <mem.h>
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#include <mem.h>
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#include <silabs/efr32bg13p.dtsi>
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#include <silabs/efr32xg13p.dtsi>
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/ {
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/ {
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sram0: memory@20000000 {
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sram0: memory@20000000 {
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@ -13,7 +13,8 @@
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};
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};
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soc {
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soc {
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compatible = "silabs,efr32bg13p632f512gm48", "silabs,efr32bg13p", "silabs,efr32", "simple-bus";
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compatible = "silabs,efr32bg13p632f512gm48", "silabs,efr32xg13p",
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"silabs,efr32", "simple-bus";
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flash-controller@400e0000 {
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flash-controller@400e0000 {
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flash0: flash@0 {
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flash0: flash@0 {
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26
dts/arm/silabs/efr32fg13p233f512gm48.dtsi
Normal file
26
dts/arm/silabs/efr32fg13p233f512gm48.dtsi
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2018 Linaro Limited
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* Copyright (c) 2021 Yonatan Schachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/efr32xg13p.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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soc {
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compatible = "silabs,efr32fg13p233f512gm48", "silabs,efr32xg13p",
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"silabs,efr32", "simple-bus";
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flash-controller@400e0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(512)>;
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};
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};
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};
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};
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24
soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p
Normal file
24
soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p
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# Silicon Labs EFR32FG13P platform configuration options
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# Copyright (c) 2018 Christian Taedcke
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# SPDX-License-Identifier: Apache-2.0
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config GPIO_GECKO
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default y
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depends on GPIO
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config UART_GECKO
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default y
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depends on SERIAL
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config I2C_GECKO
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default y
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depends on I2C
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config SOC_FLASH_GECKO
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default y
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depends on FLASH
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config SPI_GECKO
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default y
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depends on SPI
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soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.series
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soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.series
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@ -0,0 +1,20 @@
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# EFR32FG13P series configuration options
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# Copyright (c) 2018 Christian Taedcke
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_EFR32FG13P
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config SOC_SERIES
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default "efr32fg13p"
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config SOC_PART_NUMBER
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default "EFR32FG13P233F512GM48" if SOC_PART_NUMBER_EFR32FG13P233F512GM48
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config NUM_IRQS
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# must be >= the highest interrupt number used
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default 45
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source "soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p"
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endif # SOC_SERIES_EFR32FG13P
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22
soc/arm/silabs_exx32/efr32fg13p/Kconfig.series
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soc/arm/silabs_exx32/efr32fg13p/Kconfig.series
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# EFR32FG13P MCU line
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# Copyright (c) 2018 Christian Taedcke
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_EFR32FG13P
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bool "EFR32FG13P Series MCU"
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select ARM
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select HAS_SILABS_GECKO
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select HAS_SWO
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select CPU_HAS_FPU
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select CPU_HAS_ARM_MPU
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select SOC_FAMILY_EXX32
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select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
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select SOC_GECKO_HAS_HFRCO_FREQRANGE
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select SOC_GECKO_CMU
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select SOC_GECKO_GPIO
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select SOC_GECKO_HAS_ERRATA_RTCC_E201
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help
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Enable support for EFR32 FlexGecko MCU series
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8
soc/arm/silabs_exx32/efr32fg13p/Kconfig.soc
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8
soc/arm/silabs_exx32/efr32fg13p/Kconfig.soc
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# EFR32FG13P (Flex Gecko) MCU line
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# Copyright (c) 2018 Christian Taedcke
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# SPDX-License-Identifier: Apache-2.0
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config SOC_PART_NUMBER_EFR32FG13P233F512GM48
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bool
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depends on SOC_SERIES_EFR32FG13P
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16
soc/arm/silabs_exx32/efr32fg13p/linker.ld
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soc/arm/silabs_exx32/efr32fg13p/linker.ld
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/*
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* Copyright (c) 2018 Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* This is the linker script for both standard images.
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*/
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#include <autoconf.h>
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#include <arch/arm/aarch32/cortex_m/scripts/linker.ld>
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soc/arm/silabs_exx32/efr32fg13p/soc.h
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soc/arm/silabs_exx32/efr32fg13p/soc.h
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/*
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* Copyright (c) 2018 Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Board configuration macros for the efr32fg13p soc
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*
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*/
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#ifndef _SOC__H_
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#define _SOC__H_
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#include <sys/util.h>
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#ifndef _ASMLANGUAGE
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#include <em_bus.h>
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#include <em_common.h>
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/* Add include for DTS generated information */
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#include <devicetree.h>
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#include "soc_pinmap.h"
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#include "../common/soc_gpio.h"
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#endif /* !_ASMLANGUAGE */
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#endif /* _SOC__H_ */
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37
soc/arm/silabs_exx32/efr32fg13p/soc_pinmap.h
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soc/arm/silabs_exx32/efr32fg13p/soc_pinmap.h
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@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2018 Christian Taedcke
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief Silabs EFR32FG13P MCU pin definitions.
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*
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* This file contains pin configuration data required by different MCU
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* modules to correctly configure GPIO controller.
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*/
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#ifndef _SILABS_EFR32FG13P_SOC_PINMAP_H_
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#define _SILABS_EFR32FG13P_SOC_PINMAP_H_
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#include <soc.h>
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#include <em_gpio.h>
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#define GPIO_NODE DT_INST(0, silabs_gecko_gpio)
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#if DT_NODE_HAS_PROP(GPIO_NODE, location_swo)
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#define SWO_LOCATION DT_PROP(GPIO_NODE, location_swo)
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#endif
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/* Serial Wire Output (SWO) */
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#if (SWO_LOCATION == 0)
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#define PIN_SWO {gpioPortF, 2, gpioModePushPull, 1}
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#elif (SWO_LOCATION == 1)
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#define PIN_SWO {gpioPortB, 13, gpioModePushPull, 1}
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#elif (SWO_LOCATION == 2)
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#define PIN_SWO {gpioPortD, 15, gpioModePushPull, 1}
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#elif (SWO_LOCATION == 3)
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#define PIN_SWO {gpioPortC, 11, gpioModePushPull, 1}
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#elif (SWO_LOCATION >= 4)
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#error ("Invalid SWO pin location")
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#endif
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#endif /* _SILABS_EFR32FG13P_SOC_PINMAP_H_ */
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