diff --git a/CODEOWNERS b/CODEOWNERS index 0b13cbcbfd6..e0f3724146a 100644 --- a/CODEOWNERS +++ b/CODEOWNERS @@ -335,10 +335,12 @@ /dts/arm/silabs/efm32gg11b* @oanerer /dts/arm/silabs/efm32_jg_pg* @chrta /dts/arm/silabs/efr32bg13p* @mnkp +/dts/arm/silabs/efr32xg13p* @mnkp /dts/arm/silabs/efm32jg12b* @chrta /dts/arm/silabs/efm32pg12b* @chrta /dts/arm/silabs/efm32pg1b* @rdmeneze /dts/arm/silabs/efr32mg21* @l-alfred +/dts/arm/silabs/efr32fg13* @yonsch /dts/riscv/ @kgugala @pgielda /dts/riscv/it8xxx2.dtsi @ite /dts/riscv/microsemi-miv.dtsi @galak diff --git a/dts/arm/silabs/efr32bg13p632f512gm48.dtsi b/dts/arm/silabs/efr32bg13p632f512gm48.dtsi index 8a1bd1cd2f0..fcc1b1a385d 100644 --- a/dts/arm/silabs/efr32bg13p632f512gm48.dtsi +++ b/dts/arm/silabs/efr32bg13p632f512gm48.dtsi @@ -5,7 +5,7 @@ */ #include -#include +#include / { sram0: memory@20000000 { @@ -13,7 +13,8 @@ }; soc { - compatible = "silabs,efr32bg13p632f512gm48", "silabs,efr32bg13p", "silabs,efr32", "simple-bus"; + compatible = "silabs,efr32bg13p632f512gm48", "silabs,efr32xg13p", + "silabs,efr32", "simple-bus"; flash-controller@400e0000 { flash0: flash@0 { diff --git a/dts/arm/silabs/efr32fg13p233f512gm48.dtsi b/dts/arm/silabs/efr32fg13p233f512gm48.dtsi new file mode 100644 index 00000000000..b09875212aa --- /dev/null +++ b/dts/arm/silabs/efr32fg13p233f512gm48.dtsi @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2018 Linaro Limited + * Copyright (c) 2021 Yonatan Schachter + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(64)>; + }; + + soc { + compatible = "silabs,efr32fg13p233f512gm48", "silabs,efr32xg13p", + "silabs,efr32", "simple-bus"; + + flash-controller@400e0000 { + flash0: flash@0 { + reg = <0 DT_SIZE_K(512)>; + }; + }; + }; +}; diff --git a/dts/arm/silabs/efr32bg13p.dtsi b/dts/arm/silabs/efr32xg13p.dtsi similarity index 100% rename from dts/arm/silabs/efr32bg13p.dtsi rename to dts/arm/silabs/efr32xg13p.dtsi diff --git a/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p new file mode 100644 index 00000000000..ec08102e573 --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p @@ -0,0 +1,24 @@ +# Silicon Labs EFR32FG13P platform configuration options + +# Copyright (c) 2018 Christian Taedcke +# SPDX-License-Identifier: Apache-2.0 + +config GPIO_GECKO + default y + depends on GPIO + +config UART_GECKO + default y + depends on SERIAL + +config I2C_GECKO + default y + depends on I2C + +config SOC_FLASH_GECKO + default y + depends on FLASH + +config SPI_GECKO + default y + depends on SPI diff --git a/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.series b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.series new file mode 100644 index 00000000000..c2850fc9822 --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.series @@ -0,0 +1,20 @@ +# EFR32FG13P series configuration options + +# Copyright (c) 2018 Christian Taedcke +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_EFR32FG13P + +config SOC_SERIES + default "efr32fg13p" + +config SOC_PART_NUMBER + default "EFR32FG13P233F512GM48" if SOC_PART_NUMBER_EFR32FG13P233F512GM48 + +config NUM_IRQS + # must be >= the highest interrupt number used + default 45 + +source "soc/arm/silabs_exx32/efr32fg13p/Kconfig.defconfig.efr32fg13p" + +endif # SOC_SERIES_EFR32FG13P diff --git a/soc/arm/silabs_exx32/efr32fg13p/Kconfig.series b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.series new file mode 100644 index 00000000000..1913377b3e7 --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.series @@ -0,0 +1,22 @@ +# EFR32FG13P MCU line + +# Copyright (c) 2018 Christian Taedcke +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_EFR32FG13P + bool "EFR32FG13P Series MCU" + select ARM + select HAS_SILABS_GECKO + select HAS_SWO + select CPU_CORTEX_M4 + select CPU_CORTEX_M_HAS_DWT + select CPU_HAS_FPU + select CPU_HAS_ARM_MPU + select SOC_FAMILY_EXX32 + select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION + select SOC_GECKO_HAS_HFRCO_FREQRANGE + select SOC_GECKO_CMU + select SOC_GECKO_GPIO + select SOC_GECKO_HAS_ERRATA_RTCC_E201 + help + Enable support for EFR32 FlexGecko MCU series diff --git a/soc/arm/silabs_exx32/efr32fg13p/Kconfig.soc b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.soc new file mode 100644 index 00000000000..e79517fb536 --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/Kconfig.soc @@ -0,0 +1,8 @@ +# EFR32FG13P (Flex Gecko) MCU line + +# Copyright (c) 2018 Christian Taedcke +# SPDX-License-Identifier: Apache-2.0 + +config SOC_PART_NUMBER_EFR32FG13P233F512GM48 + bool + depends on SOC_SERIES_EFR32FG13P diff --git a/soc/arm/silabs_exx32/efr32fg13p/linker.ld b/soc/arm/silabs_exx32/efr32fg13p/linker.ld new file mode 100644 index 00000000000..22ea2d25e5c --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/linker.ld @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Linker command/script file + * + * This is the linker script for both standard images. + */ + +#include + +#include diff --git a/soc/arm/silabs_exx32/efr32fg13p/soc.h b/soc/arm/silabs_exx32/efr32fg13p/soc.h new file mode 100644 index 00000000000..770ef4ca77e --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/soc.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Board configuration macros for the efr32fg13p soc + * + */ + +#ifndef _SOC__H_ +#define _SOC__H_ + +#include + +#ifndef _ASMLANGUAGE + +#include +#include + +/* Add include for DTS generated information */ +#include + +#include "soc_pinmap.h" +#include "../common/soc_gpio.h" + +#endif /* !_ASMLANGUAGE */ + +#endif /* _SOC__H_ */ diff --git a/soc/arm/silabs_exx32/efr32fg13p/soc_pinmap.h b/soc/arm/silabs_exx32/efr32fg13p/soc_pinmap.h new file mode 100644 index 00000000000..0d802e43709 --- /dev/null +++ b/soc/arm/silabs_exx32/efr32fg13p/soc_pinmap.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * SPDX-License-Identifier: Apache-2.0 + */ + +/** @file + * @brief Silabs EFR32FG13P MCU pin definitions. + * + * This file contains pin configuration data required by different MCU + * modules to correctly configure GPIO controller. + */ + +#ifndef _SILABS_EFR32FG13P_SOC_PINMAP_H_ +#define _SILABS_EFR32FG13P_SOC_PINMAP_H_ + +#include +#include + +#define GPIO_NODE DT_INST(0, silabs_gecko_gpio) +#if DT_NODE_HAS_PROP(GPIO_NODE, location_swo) +#define SWO_LOCATION DT_PROP(GPIO_NODE, location_swo) +#endif + +/* Serial Wire Output (SWO) */ +#if (SWO_LOCATION == 0) +#define PIN_SWO {gpioPortF, 2, gpioModePushPull, 1} +#elif (SWO_LOCATION == 1) +#define PIN_SWO {gpioPortB, 13, gpioModePushPull, 1} +#elif (SWO_LOCATION == 2) +#define PIN_SWO {gpioPortD, 15, gpioModePushPull, 1} +#elif (SWO_LOCATION == 3) +#define PIN_SWO {gpioPortC, 11, gpioModePushPull, 1} +#elif (SWO_LOCATION >= 4) +#error ("Invalid SWO pin location") +#endif + +#endif /* _SILABS_EFR32FG13P_SOC_PINMAP_H_ */