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soc: nxp: s32k146: add LPSPI support

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Add LPSPI nodes to S32K1xx devices.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2023-12-01 13:28:36 +07:00 • committed by David Leach
commit 18202d0db3
3 changed files with 37 additions and 0 deletions
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8
dts/arm/nxp/nxp_s32k146.dtsi
View file

@ -51,3 +51,11 @@
&lpuart2 { &lpuart2 {
clocks = <&clock NXP_S32_LPUART2_CLK>; clocks = <&clock NXP_S32_LPUART2_CLK>;
}; };
&lpspi1 {
clocks = <&clock NXP_S32_LPSPI1_CLK>;
};
&lpspi2 {
clocks = <&clock NXP_S32_LPSPI2_CLK>;
};

28
dts/arm/nxp/nxp_s32k1xx.dtsi
View file

@ -44,6 +44,34 @@
status = "disabled"; status = "disabled";
}; };
lpspi0: spi@4002c000 {
compatible = "nxp,imx-lpspi";
reg = <0x4002c000 0x1000>;
interrupts = <26 0>;
clocks = <&clock NXP_S32_LPSPI0_CLK>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
lpspi1: spi@4002d000 {
compatible = "nxp,imx-lpspi";
reg = <0x4002d000 0x1000>;
interrupts = <27 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
lpspi2: spi@4002e000 {
compatible = "nxp,imx-lpspi";
reg = <0x4002e000 0x1000>;
interrupts = <28 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
porta: pinmux@40049000 { porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux"; compatible = "nxp,kinetis-pinmux";
reg = <0x40049000 0x1000>; reg = <0x40049000 0x1000>;

1
soc/arm/nxp_s32/s32k1/Kconfig.series
View file

@ -15,5 +15,6 @@ config SOC_SERIES_S32K1XX
select CLOCK_CONTROL select CLOCK_CONTROL
select HAS_MCUX_LPUART select HAS_MCUX_LPUART
select HAS_MCUX_LPI2C select HAS_MCUX_LPI2C
select HAS_MCUX_LPSPI
help help
Enable support for NXP S32K1XX MCU series. Enable support for NXP S32K1XX MCU series.