From 18202d0db316760c9060ef200f1470de8ac89334 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Manuel=20Arg=C3=BCelles?= Date: Fri, 1 Dec 2023 13:28:36 +0700 Subject: [PATCH] soc: nxp: s32k146: add LPSPI support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add LPSPI nodes to S32K1xx devices. Signed-off-by: Manuel Argüelles --- dts/arm/nxp/nxp_s32k146.dtsi | 8 ++++++++ dts/arm/nxp/nxp_s32k1xx.dtsi | 28 ++++++++++++++++++++++++++++ soc/arm/nxp_s32/s32k1/Kconfig.series | 1 + 3 files changed, 37 insertions(+) diff --git a/dts/arm/nxp/nxp_s32k146.dtsi b/dts/arm/nxp/nxp_s32k146.dtsi index 9ca9c63635f..b875f09ce65 100644 --- a/dts/arm/nxp/nxp_s32k146.dtsi +++ b/dts/arm/nxp/nxp_s32k146.dtsi @@ -51,3 +51,11 @@ &lpuart2 { clocks = <&clock NXP_S32_LPUART2_CLK>; }; + +&lpspi1 { + clocks = <&clock NXP_S32_LPSPI1_CLK>; +}; + +&lpspi2 { + clocks = <&clock NXP_S32_LPSPI2_CLK>; +}; diff --git a/dts/arm/nxp/nxp_s32k1xx.dtsi b/dts/arm/nxp/nxp_s32k1xx.dtsi index a46c73598a2..5a5a32fefa6 100644 --- a/dts/arm/nxp/nxp_s32k1xx.dtsi +++ b/dts/arm/nxp/nxp_s32k1xx.dtsi @@ -44,6 +44,34 @@ status = "disabled"; }; + lpspi0: spi@4002c000 { + compatible = "nxp,imx-lpspi"; + reg = <0x4002c000 0x1000>; + interrupts = <26 0>; + clocks = <&clock NXP_S32_LPSPI0_CLK>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + lpspi1: spi@4002d000 { + compatible = "nxp,imx-lpspi"; + reg = <0x4002d000 0x1000>; + interrupts = <27 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + lpspi2: spi@4002e000 { + compatible = "nxp,imx-lpspi"; + reg = <0x4002e000 0x1000>; + interrupts = <28 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + porta: pinmux@40049000 { compatible = "nxp,kinetis-pinmux"; reg = <0x40049000 0x1000>; diff --git a/soc/arm/nxp_s32/s32k1/Kconfig.series b/soc/arm/nxp_s32/s32k1/Kconfig.series index 7359038ee54..9b6f0086509 100644 --- a/soc/arm/nxp_s32/s32k1/Kconfig.series +++ b/soc/arm/nxp_s32/s32k1/Kconfig.series @@ -15,5 +15,6 @@ config SOC_SERIES_S32K1XX select CLOCK_CONTROL select HAS_MCUX_LPUART select HAS_MCUX_LPI2C + select HAS_MCUX_LPSPI help Enable support for NXP S32K1XX MCU series.