soc: nxp: s32k146: add LPSPI support
Add LPSPI nodes to S32K1xx devices. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
parent
4f9e2c4a7a
commit
18202d0db3
3 changed files with 37 additions and 0 deletions
|
@ -51,3 +51,11 @@
|
|||
&lpuart2 {
|
||||
clocks = <&clock NXP_S32_LPUART2_CLK>;
|
||||
};
|
||||
|
||||
&lpspi1 {
|
||||
clocks = <&clock NXP_S32_LPSPI1_CLK>;
|
||||
};
|
||||
|
||||
&lpspi2 {
|
||||
clocks = <&clock NXP_S32_LPSPI2_CLK>;
|
||||
};
|
||||
|
|
|
@ -44,6 +44,34 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
lpspi0: spi@4002c000 {
|
||||
compatible = "nxp,imx-lpspi";
|
||||
reg = <0x4002c000 0x1000>;
|
||||
interrupts = <26 0>;
|
||||
clocks = <&clock NXP_S32_LPSPI0_CLK>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpspi1: spi@4002d000 {
|
||||
compatible = "nxp,imx-lpspi";
|
||||
reg = <0x4002d000 0x1000>;
|
||||
interrupts = <27 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpspi2: spi@4002e000 {
|
||||
compatible = "nxp,imx-lpspi";
|
||||
reg = <0x4002e000 0x1000>;
|
||||
interrupts = <28 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
porta: pinmux@40049000 {
|
||||
compatible = "nxp,kinetis-pinmux";
|
||||
reg = <0x40049000 0x1000>;
|
||||
|
|
|
@ -15,5 +15,6 @@ config SOC_SERIES_S32K1XX
|
|||
select CLOCK_CONTROL
|
||||
select HAS_MCUX_LPUART
|
||||
select HAS_MCUX_LPI2C
|
||||
select HAS_MCUX_LPSPI
|
||||
help
|
||||
Enable support for NXP S32K1XX MCU series.
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue