boards: rakwireless: rak3172: Fix clock settings
Enabling HSE and LSE clock settings. Signed-off-by: Sercan Erat <sercanerat@gmail.com>
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parent
01a92d0a42
commit
168395f195
2 changed files with 6 additions and 12 deletions
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@ -43,20 +43,16 @@
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&lptim1 {
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&lptim1 {
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
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<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
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status = "okay";
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};
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&clk_lsi {
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status = "okay";
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status = "okay";
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};
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};
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&pll {
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&pll {
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div-m = <1>;
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div-m = <1>;
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mul-n = <6>;
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mul-n = <3>;
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div-r = <2>;
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div-r = <2>;
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div-q = <2>;
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div-q = <2>;
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clocks = <&clk_hsi>;
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clocks = <&clk_hse>;
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status = "okay";
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status = "okay";
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};
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};
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@ -99,7 +95,7 @@
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&rtc {
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&rtc {
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
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<&rcc STM32_SRC_LSI RTC_SEL(2)>;
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<&rcc STM32_SRC_LSE RTC_SEL(1)>;
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status = "okay";
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status = "okay";
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};
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};
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@ -115,10 +111,6 @@
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status = "okay";
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status = "okay";
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};
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};
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&clk_hsi {
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status = "okay";
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};
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&flash0 {
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&flash0 {
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partitions {
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partitions {
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compatible = "fixed-partitions";
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compatible = "fixed-partitions";
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@ -7,10 +7,12 @@
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#include <st/wl/stm32wle5ccux-pinctrl.dtsi>
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#include <st/wl/stm32wle5ccux-pinctrl.dtsi>
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&clk_hse {
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&clk_hse {
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status = "okay";
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clock-frequency = <DT_FREQ_M(32)>;
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clock-frequency = <DT_FREQ_M(32)>;
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};
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};
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&clk_lse {
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&clk_lse {
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status = "okay";
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clock-frequency = <32768>;
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clock-frequency = <32768>;
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};
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};
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