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boards: rakwireless: rak3172: Fix clock settings

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Enabling HSE and LSE clock settings.

Signed-off-by: Sercan Erat <sercanerat@gmail.com>
This commit is contained in:
Sercan Erat 2025-05-12 00:19:58 +03:00 • committed by Fabio Baltieri
commit 168395f195
2 changed files with 6 additions and 12 deletions
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16
boards/rakwireless/rak3172/rak3172.dts
View file

@ -43,20 +43,16 @@
&lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
status = "okay";
};
&clk_lsi {
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <6>;
mul-n = <3>;
div-r = <2>;
div-q = <2>;
clocks = <&clk_hsi>;
clocks = <&clk_hse>;
status = "okay";
};
@ -99,7 +95,7 @@
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
@ -115,10 +111,6 @@
status = "okay";
};
&clk_hsi {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";

2
dts/arm/rakwireless/rak3172.dtsi
View file

@ -7,10 +7,12 @@
#include <st/wl/stm32wle5ccux-pinctrl.dtsi>
&clk_hse {
status = "okay";
clock-frequency = <DT_FREQ_M(32)>;
};
&clk_lse {
status = "okay";
clock-frequency = <32768>;
};