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board: iotdk: necessary clean up based on latest master branch

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* clean up the DTS related definitions
* code cleanup
* do the tests/kernel sannity check

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2018-12-12 19:16:36 +08:00 • committed by Anas Nashif
commit 163625cf78
6 changed files with 43 additions and 54 deletions
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56
soc/arc/snps_arc_iot/dts_fixup.h
View file

@ -7,43 +7,43 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
/* CCM configuration */ /* CCM configuration */
#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS #define DT_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10) #define DT_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_20000000_BASE_ADDRESS #define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_20000000_BASE_ADDRESS
#define CONFIG_ICCM_SIZE (ARC_ICCM_20000000_SIZE >> 10) #define DT_ICCM_SIZE (DT_ARC_ICCM_20000000_SIZE >> 10)
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_80014000_BASE_ADDRESS #define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_80014000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_80014000_IRQ_0 #define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_80014000_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_80014000_CLOCK_FREQUENCY #define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_80014000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_80014000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_80014000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_80014000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_80014000_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_80014000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_80014000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_80014100_BASE_ADDRESS #define DT_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_80014100_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_80014100_IRQ_0 #define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_80014100_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_80014100_CLOCK_FREQUENCY #define DT_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_80014100_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_80014100_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_80014100_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_80014100_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_80014100_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_80014100_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_80014100_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_2_BASE_ADDR NS16550_80014200_BASE_ADDRESS #define DT_UART_NS16550_PORT_2_BASE_ADDR DT_NS16550_80014200_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_2_IRQ NS16550_80014200_IRQ_0 #define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_80014200_IRQ_0
#define CONFIG_UART_NS16550_PORT_2_CLK_FREQ NS16550_80014200_CLOCK_FREQUENCY #define DT_UART_NS16550_PORT_2_CLK_FREQ DT_NS16550_80014200_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_2_BAUD_RATE NS16550_80014200_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_2_BAUD_RATE DT_NS16550_80014200_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_2_NAME NS16550_80014200_LABEL #define CONFIG_UART_NS16550_PORT_2_NAME DT_NS16550_80014200_LABEL
#define CONFIG_UART_NS16550_PORT_2_IRQ_PRI NS16550_80014200_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_80014200_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_3_BASE_ADDR NS16550_80014300_BASE_ADDRESS #define DT_UART_NS16550_PORT_3_BASE_ADDR DT_NS16550_80014300_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_3_IRQ NS16550_80014300_IRQ_0 #define DT_UART_NS16550_PORT_3_IRQ DT_NS16550_80014300_IRQ_0
#define CONFIG_UART_NS16550_PORT_3_CLK_FREQ NS16550_80014300_CLOCK_FREQUENCY #define DT_UART_NS16550_PORT_3_CLK_FREQ DT_NS16550_80014300_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_3_BAUD_RATE NS16550_80014300_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_3_BAUD_RATE DT_NS16550_80014300_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_3_NAME NS16550_80014300_LABEL #define CONFIG_UART_NS16550_PORT_3_NAME DT_NS16550_80014300_LABEL
#define CONFIG_UART_NS16550_PORT_3_IRQ_PRI NS16550_80014300_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_3_IRQ_PRI DT_NS16550_80014300_IRQ_0_PRIORITY
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

12
soc/arc/snps_arc_iot/linker.ld
View file

@ -26,18 +26,18 @@
/* Instruction Closely Coupled Memory (ICCM) base address and size */ /* Instruction Closely Coupled Memory (ICCM) base address and size */
#if defined(CONFIG_ICCM_BASE_ADDRESS) && (CONFIG_ICCM_SIZE > 0) #if defined(DT_ICCM_BASE_ADDRESS) && (DT_ICCM_SIZE > 0)
#define ICCM_START CONFIG_ICCM_BASE_ADDRESS #define ICCM_START DT_ICCM_BASE_ADDRESS
#define ICCM_SIZE CONFIG_ICCM_SIZE #define ICCM_SIZE DT_ICCM_SIZE
#endif #endif
/* /*
* DCCM base address and size. DCCM is the data memory. * DCCM base address and size. DCCM is the data memory.
*/ */
/* Data Closely Coupled Memory (DCCM) base address and size */ /* Data Closely Coupled Memory (DCCM) base address and size */
#if defined(CONFIG_DCCM_BASE_ADDRESS) && (CONFIG_DCCM_SIZE > 0) #if defined(DT_DCCM_BASE_ADDRESS) && (DT_DCCM_SIZE > 0)
#define DCCM_START CONFIG_DCCM_BASE_ADDRESS #define DCCM_START DT_DCCM_BASE_ADDRESS
#define DCCM_SIZE CONFIG_DCCM_SIZE #define DCCM_SIZE DT_DCCM_SIZE
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>

4
soc/arc/snps_arc_iot/soc.c
View file

@ -6,7 +6,7 @@
*/ */
/** /**
* This module provides routines to initialize and support board-level hardware * This module provides routines to initialize and support soc-level hardware
* for the IoT Development Kit board. * for the IoT Development Kit board.
* *
*/ */
@ -19,7 +19,7 @@ static int arc_iot_init(struct device *dev)
ARG_UNUSED(dev); ARG_UNUSED(dev);
if (arc_iot_pll_fout_config( if (arc_iot_pll_fout_config(
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC/1000000) < 0) { CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / 1000000) < 0) {
return -1; return -1;
} }

17
soc/arc/snps_arc_iot/soc.h
View file

@ -20,7 +20,7 @@
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(16) #define SYSCLK_DEFAULT_IOSC_HZ MHZ(16)
/* /*
* UART * UART: use lr and sr to access subsystem uart IP
*/ */
#define UART_NS16550_ACCESS_IOPORT #define UART_NS16550_ACCESS_IOPORT
@ -38,21 +38,12 @@
#include <misc/util.h> #include <misc/util.h>
#include <random/rand32.h> #include <random/rand32.h>
#define ARCV2_TIMER0_INT_LVL IRQ_TIMER0
#define ARCV2_TIMER0_INT_PRI 0
#define ARCV2_TIMER1_INT_LVL IRQ_TIMER1
#define ARCV2_TIMER1_INT_PRI 1
#define INT_ENABLE_ARC ~(0x00000001 << 8)
#define INT_ENABLE_ARC_BIT_POS (8)
/* /*
* UARTs: UART0 & UART1 & UART2 * UARTs: UART0 & UART1 & UART2
*/ */
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */ #define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Default */
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */ #define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */
#define CONFIG_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */ #define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */
#endif /* !_ASMLANGUAGE */ #endif /* !_ASMLANGUAGE */

1
soc/arc/snps_arc_iot/sysconf.c
View file

@ -151,7 +151,6 @@ void arc_iot_dio_clk_divisor(uint8_t div)
sysconf_reg_ptr->SDIO_REFCLK_DIV; sysconf_reg_ptr->SDIO_REFCLK_DIV;
} }
void arc_iot_spi_master_clk_divisor(uint8_t id, uint8_t div) void arc_iot_spi_master_clk_divisor(uint8_t id, uint8_t div)
{ {
if (id == SPI_MASTER_0) { if (id == SPI_MASTER_0) {

1
soc/arc/snps_arc_iot/sysconf.h
View file

@ -140,7 +140,6 @@ typedef struct sysconf_reg {
extern void arc_iot_pll_conf_reg(uint32_t val); extern void arc_iot_pll_conf_reg(uint32_t val);
extern int32_t arc_iot_pll_fout_config(uint32_t freq); extern int32_t arc_iot_pll_fout_config(uint32_t freq);
extern void arc_iot_ahb_clk_divisor(uint8_t div); extern void arc_iot_ahb_clk_divisor(uint8_t div);
extern void arc_iot_ahb_clk_enable(uint8_t dev); extern void arc_iot_ahb_clk_enable(uint8_t dev);
extern void arc_iot_ahb_clk_disable(uint8_t dev); extern void arc_iot_ahb_clk_disable(uint8_t dev);