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soc: riscv32: Move rv32m1 flash memory definitions to dts

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Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2019-05-06 13:50:52 -05:00 • committed by Anas Nashif
commit 15baad9419
7 changed files with 75 additions and 15 deletions
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4
soc/riscv32/openisa_rv32m1/linker.ld
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@ -29,8 +29,8 @@
#define ROMABLE_REGION ROM
#define RAMABLE_REGION RAM
#define ROM_BASE CONFIG_RISCV32_RV32M1_ROM_BASE_ADDR
#define ROM_SIZE CONFIG_RISCV32_RV32M1_ROM_SIZE
#define ROM_BASE DT_FLASH_BASE_ADDRESS
#define ROM_SIZE KB(DT_FLASH_SIZE)
#define RAM_BASE DT_SRAM_BASE_ADDRESS
#define RAM_SIZE KB(DT_SRAM_SIZE)
#define VECTOR_BASE CONFIG_RISCV32_RV32M1_VECTOR_BASE_ADDR