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drivers: clock_control: mcux_scg: add NXP MCUX SCG clock control driver

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Add clock controller driver for the NXP Kinetis System Clock Generator
(SCG) clock module.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2019-06-16 22:16:35 +02:00 • committed by Maureen Helm
commit 13847a315d
8 changed files with 153 additions and 0 deletions
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18
include/dt-bindings/clock/kinetis_scg.h
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@ -29,4 +29,22 @@
#define KINETIS_SCG_CLKOUT_SRC_FIRC 3U
#define KINETIS_SCG_CLKOUT_SRC_SPLL 6U
/* SCG clock controller clock names */
#define KINETIS_SCG_CORESYS_CLK 0U
#define KINETIS_SCG_BUS_CLK 1U
#define KINETIS_SCG_FLEXBUS_CLK 2U
#define KINETIS_SCG_FLASH_CLK 3U
#define KINETIS_SCG_SOSC_CLK 4U
#define KINETIS_SCG_SIRC_CLK 5U
#define KINETIS_SCG_FIRC_CLK 6U
#define KINETIS_SCG_SPLL_CLK 7U
#define KINETIS_SCG_SOSC_ASYNC_DIV1_CLK 8U
#define KINETIS_SCG_SOSC_ASYNC_DIV2_CLK 9U
#define KINETIS_SCG_SIRC_ASYNC_DIV1_CLK 10U
#define KINETIS_SCG_SIRC_ASYNC_DIV2_CLK 11U
#define KINETIS_SCG_FIRC_ASYNC_DIV1_CLK 12U
#define KINETIS_SCG_FIRC_ASYNC_DIV2_CLK 13U
#define KINETIS_SCG_SPLL_ASYNC_DIV1_CLK 14U
#define KINETIS_SCG_SPLL_ASYNC_DIV2_CLK 15U
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_KINETIS_SCG_H_ */