diff --git a/drivers/pinctrl/Kconfig.npcx b/drivers/pinctrl/Kconfig.npcx index 7e131c90d8e..3ad302e63fd 100644 --- a/drivers/pinctrl/Kconfig.npcx +++ b/drivers/pinctrl/Kconfig.npcx @@ -8,7 +8,6 @@ DT_COMPAT_ST_PINCTRL_NPCX := nuvoton,npcx-pinctrl config PINCTRL_NPCX bool "Nuvoton NPCX embedded controller (EC) pin controller driver" depends on SOC_FAMILY_NPCX - select PINCTRL_STORE_REG default $(dt_compat_enabled,$(DT_COMPAT_ST_PINCTRL_NPCX)) help This option enables the pin controller driver for NPCX family of diff --git a/drivers/pinctrl/pinctrl_npcx.c b/drivers/pinctrl/pinctrl_npcx.c index d085f29112e..616af8af467 100644 --- a/drivers/pinctrl/pinctrl_npcx.c +++ b/drivers/pinctrl/pinctrl_npcx.c @@ -17,6 +17,22 @@ static const struct npcx_pinctrl_config npcx_pinctrl_cfg = { .base_scfg = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg), }; +/* PWM pinctrl config */ +struct npcx_pwm_pinctrl_config { + uintptr_t base; + int channel; +}; + +#define NPCX_PWM_PINCTRL_CFG_INIT(node_id) \ + { \ + .base = DT_REG_ADDR(node_id), \ + .channel = DT_PROP(node_id, pwm_channel), \ + }, + +static const struct npcx_pwm_pinctrl_config pwm_pinctrl_cfg[] = { + DT_FOREACH_STATUS_OKAY(nuvoton_npcx_pwm, NPCX_PWM_PINCTRL_CFG_INIT) +}; + /* Pin-control local functions for peripheral devices */ static bool npcx_periph_pinmux_has_lock(int group) { @@ -70,8 +86,23 @@ static void npcx_periph_pupd_configure(const struct npcx_periph *pupd, } } -static void npcx_periph_pwm_drive_mode_configure(uintptr_t reg, bool is_od) +static void npcx_periph_pwm_drive_mode_configure(const struct npcx_periph *periph, + bool is_od) { + uintptr_t reg = 0; + + /* Find selected pwm module which enables open-drain prop. */ + for (int i = 0; i < ARRAY_SIZE(pwm_pinctrl_cfg); i++) { + if (periph->group == pwm_pinctrl_cfg[i].channel) { + reg = pwm_pinctrl_cfg[i].base; + break; + } + } + + if (reg == 0) { + return; + } + struct pwm_reg *const inst = (struct pwm_reg *)(reg); if (is_od) { @@ -94,7 +125,7 @@ static void npcx_periph_configure(const pinctrl_soc_pin_t *pin, uintptr_t reg) pin->flags.io_bias_type); } else if (pin->cfg.periph.type == NPCX_PINCTRL_TYPE_PERIPH_DRIVE) { /* Configure peripheral device's drive mode. (Only PWM pads support it) */ - npcx_periph_pwm_drive_mode_configure(reg, + npcx_periph_pwm_drive_mode_configure(&pin->cfg.periph, pin->flags.io_drive_type == NPCX_DRIVE_TYPE_OPEN_DRAIN); } } diff --git a/dts/arm/nuvoton/npcx.dtsi b/dts/arm/nuvoton/npcx.dtsi index 5b3c784bce0..81aaee46770 100644 --- a/dts/arm/nuvoton/npcx.dtsi +++ b/dts/arm/nuvoton/npcx.dtsi @@ -293,6 +293,7 @@ pwm0: pwm@40080000 { compatible = "nuvoton,npcx-pwm"; reg = <0x40080000 0x2000>; + pwm-channel = <0>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 0>; #pwm-cells = <3>; status = "disabled"; @@ -302,6 +303,7 @@ pwm1: pwm@40082000 { compatible = "nuvoton,npcx-pwm"; reg = <0x40082000 0x2000>; + pwm-channel = <1>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 1>; #pwm-cells = <3>; status = "disabled"; @@ -311,6 +313,7 @@ pwm2: pwm@40084000 { compatible = "nuvoton,npcx-pwm"; reg = <0x40084000 0x2000>; + pwm-channel = <2>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 2>; #pwm-cells = <3>; status = "disabled"; @@ -320,6 +323,7 @@ pwm3: pwm@40086000 { compatible = "nuvoton,npcx-pwm"; reg = <0x40086000 0x2000>; + pwm-channel = <3>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 3>; #pwm-cells = <3>; status = "disabled"; @@ -329,6 +333,7 @@ pwm4: pwm@40088000 { compatible = "nuvoton,npcx-pwm"; reg = <0x40088000 0x2000>; + pwm-channel = <4>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 4>; #pwm-cells = <3>; status = "disabled"; @@ -338,6 +343,7 @@ pwm5: pwm@4008a000 { compatible = "nuvoton,npcx-pwm"; reg = <0x4008a000 0x2000>; + pwm-channel = <5>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 5>; #pwm-cells = <3>; status = "disabled"; @@ -347,6 +353,7 @@ pwm6: pwm@4008c000 { compatible = "nuvoton,npcx-pwm"; reg = <0x4008c000 0x2000>; + pwm-channel = <6>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 6>; #pwm-cells = <3>; status = "disabled"; @@ -356,6 +363,7 @@ pwm7: pwm@4008e000 { compatible = "nuvoton,npcx-pwm"; reg = <0x4008e000 0x2000>; + pwm-channel = <7>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 7>; #pwm-cells = <3>; status = "disabled"; diff --git a/dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi b/dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi index bac179bbd07..2788723f564 100644 --- a/dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi +++ b/dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi @@ -111,42 +111,34 @@ /* PWM peripheral interfaces */ /omit-if-no-ref/ pwm0_gpc3: periph-pwm0 { pinmux = <&alt4_pwm0_sl>; - drive-supported; }; /omit-if-no-ref/ pwm1_gpc2: periph-pwm1 { pinmux = <&alt4_pwm1_sl>; - drive-supported; }; /omit-if-no-ref/ pwm2_gpc4: periph-pwm2 { pinmux = <&alt4_pwm2_sl>; - drive-supported; }; /omit-if-no-ref/ pwm3_gp80: periph-pwm3 { pinmux = <&alt4_pwm3_sl>; - drive-supported; }; /omit-if-no-ref/ pwm4_gpb6: periph-pwm4 { pinmux = <&alt4_pwm4_sl>; - drive-supported; }; /omit-if-no-ref/ pwm5_gpb7: periph-pwm5 { pinmux = <&alt4_pwm5_sl>; - drive-supported; }; /omit-if-no-ref/ pwm6_gpc0: periph-pwm6 { pinmux = <&alt4_pwm6_sl>; - drive-supported; }; /omit-if-no-ref/ pwm7_gp60: periph-pwm7 { pinmux = <&alt4_pwm7_sl>; - drive-supported; }; /* Keyboard peripheral interfaces. */ diff --git a/dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi b/dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi index cd902e2ecca..0b3551f0518 100644 --- a/dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi +++ b/dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi @@ -111,42 +111,34 @@ /* PWM peripheral interfaces */ /omit-if-no-ref/ pwm0_gpc3: periph-pwm0 { pinmux = <&alt4_pwm0_sl>; - drive-supported; }; /omit-if-no-ref/ pwm1_gpc2: periph-pwm1 { pinmux = <&alt4_pwm1_sl>; - drive-supported; }; /omit-if-no-ref/ pwm2_gpc4: periph-pwm2 { pinmux = <&alt4_pwm2_sl>; - drive-supported; }; /omit-if-no-ref/ pwm3_gp80: periph-pwm3 { pinmux = <&alt4_pwm3_sl>; - drive-supported; }; /omit-if-no-ref/ pwm4_gpb6: periph-pwm4 { pinmux = <&alt4_pwm4_sl>; - drive-supported; }; /omit-if-no-ref/ pwm5_gpb7: periph-pwm5 { pinmux = <&alt4_pwm5_sl>; - drive-supported; }; /omit-if-no-ref/ pwm6_gpc0: periph-pwm6 { pinmux = <&alt4_pwm6_sl>; - drive-supported; }; /omit-if-no-ref/ pwm7_gp60: periph-pwm7 { pinmux = <&alt4_pwm7_sl>; - drive-supported; }; /* Keyboard peripheral interfaces. */ diff --git a/dts/bindings/pinctrl/nuvoton,npcx-pinctrl.yaml b/dts/bindings/pinctrl/nuvoton,npcx-pinctrl.yaml index bca17ac9db7..04d6e9af0d6 100644 --- a/dts/bindings/pinctrl/nuvoton,npcx-pinctrl.yaml +++ b/dts/bindings/pinctrl/nuvoton,npcx-pinctrl.yaml @@ -61,12 +61,6 @@ child-binding: description: | A map to PUPD_ENn register/bit that enable pull-up/down of NPCX peripheral devices. Please don't overwrite this property in the board-level DT driver. - drive-supported: - required: false - type: boolean - description: | - It indicates the pad's drive mode is selectable. So far, only PWM's pad has this - property in npcx series. Please don't overwrite it in the board-level DT driver. pinmux-locked: required: false type: boolean diff --git a/dts/bindings/pwm/nuvoton,npcx-pwm.yaml b/dts/bindings/pwm/nuvoton,npcx-pwm.yaml index 20df277d596..359c3b093e9 100644 --- a/dts/bindings/pwm/nuvoton,npcx-pwm.yaml +++ b/dts/bindings/pwm/nuvoton,npcx-pwm.yaml @@ -18,11 +18,11 @@ properties: required: true pinctrl-names: required: true - drive-open-drain: - type: boolean + pwm-channel: + type: int description: | - The PWM output will be configured as open-drain. If not set, - defaults to push-pull. + A index to indicate PWM module that generates a single PWM signal. + Please don't overwrite it in the board-level DT driver. clock-bus: required: false type: string diff --git a/soc/arm/nuvoton_npcx/common/pinctrl_soc.h b/soc/arm/nuvoton_npcx/common/pinctrl_soc.h index 7d1fdb1d19c..befef6e84f8 100644 --- a/soc/arm/nuvoton_npcx/common/pinctrl_soc.h +++ b/soc/arm/nuvoton_npcx/common/pinctrl_soc.h @@ -102,9 +102,9 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t; UTIL_OR(DT_PROP(node_id, bias_pull_down), \ DT_PROP(node_id, bias_pull_up)) -#define Z_PINCTRL_NPCX_HAS_DRIVE_PROP(node_id) \ - UTIL_AND(DT_PROP(node_id, drive_open_drain), \ - DT_PROP(node_id, drive_supported)) +#define Z_PINCTRL_NPCX_HAS_DRIVE_PROP(node_id, node_periph) \ + UTIL_AND(DT_PROP(node_id, drive_open_drain), \ + DT_NODE_HAS_PROP(node_periph, pwm_channel)) /** * @brief Utility macro to initialize a periphral pinmux configuration. @@ -142,12 +142,14 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t; * @brief Utility macro to initialize a periphral drive mode configuration. * * @param node_id Node identifier. + * @param node_periph Peripheral node identifier. */ -#define Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT(node_id) \ +#define Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT(node_id, node_periph) \ { \ .flags.type = NPCX_PINCTRL_TYPE_PERIPH, \ .flags.io_drive_type = Z_PINCTRL_NPCX_DRIVE_TYPE(node_id), \ .cfg.periph.type = NPCX_PINCTRL_TYPE_PERIPH_DRIVE, \ + .cfg.periph.group = DT_PROP(node_periph, pwm_channel), \ }, /** @@ -158,9 +160,10 @@ typedef struct npcx_pinctrl pinctrl_soc_pin_t; * @param idx Property entry index. */ #define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \ - COND_CODE_1(Z_PINCTRL_NPCX_HAS_DRIVE_PROP(DT_PROP_BY_IDX(node_id, prop, idx)), \ + COND_CODE_1(Z_PINCTRL_NPCX_HAS_DRIVE_PROP( \ + DT_PROP_BY_IDX(node_id, prop, idx), node_id), \ (Z_PINCTRL_NPCX_PERIPH_DRIVE_INIT( \ - DT_PROP_BY_IDX(node_id, prop, idx))), ()) \ + DT_PROP_BY_IDX(node_id, prop, idx), node_id)), ()) \ COND_CODE_1(Z_PINCTRL_NPCX_HAS_PUPD_PROP(DT_PROP_BY_IDX(node_id, prop, idx)), \ (Z_PINCTRL_NPCX_PERIPH_PUPD_INIT( \ DT_PROP_BY_IDX(node_id, prop, idx), periph_pupd)), ()) \