boards: x86: tune X86_MMU_PAGE_POOL_PAGES

These are set such that we have enough pages in the pool
for typical driver mappings and to instantiate two more
memory domains, which is what our tests require.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2020-10-23 16:00:15 -07:00 committed by Anas Nashif
commit 0dae74e4a5
9 changed files with 10 additions and 7 deletions

View file

@ -17,3 +17,4 @@ CONFIG_MP_NUM_CPUS=2
CONFIG_X86_MMU=y
CONFIG_X86_VERY_EARLY_CONSOLE=y
CONFIG_QEMU_ICOUNT=n
CONFIG_X86_MMU_PAGE_POOL_PAGES=23

View file

@ -18,3 +18,4 @@ CONFIG_X86_MMU=y
CONFIG_X86_VERY_EARLY_CONSOLE=y
CONFIG_QEMU_ICOUNT=n
CONFIG_X86_KPTI=n
CONFIG_X86_MMU_PAGE_POOL_PAGES=16

View file

@ -12,7 +12,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_X86_MMU=y
CONFIG_X86_MMU_PAGE_POOL_PAGES=15
CONFIG_X86_MMU_PAGE_POOL_PAGES=17
CONFIG_DEBUG_INFO=y
CONFIG_SCHED_SCALABLE=y
CONFIG_WAITQ_SCALABLE=y

View file

@ -12,7 +12,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_X86_MMU=y
CONFIG_X86_MMU_PAGE_POOL_PAGES=15
CONFIG_X86_MMU_PAGE_POOL_PAGES=17
CONFIG_DEBUG_INFO=y
CONFIG_SCHED_SCALABLE=y
CONFIG_WAITQ_SCALABLE=y

View file

@ -12,7 +12,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_X86_MMU=y
CONFIG_X86_MMU_PAGE_POOL_PAGES=15
CONFIG_X86_MMU_PAGE_POOL_PAGES=12
CONFIG_DEBUG_INFO=y
CONFIG_SCHED_SCALABLE=y
CONFIG_WAITQ_SCALABLE=y

View file

@ -12,7 +12,7 @@ CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_X86_MMU=y
CONFIG_X86_MMU_PAGE_POOL_PAGES=15
CONFIG_X86_MMU_PAGE_POOL_PAGES=10
CONFIG_DEBUG_INFO=y
CONFIG_SCHED_SCALABLE=y
CONFIG_WAITQ_SCALABLE=y