x86: move page table reservation macros
We don't need this for stacks any more and only use this for pre-calculating the boot page tables size. Move to C code, this doesn't need to be in headers anywhere. Names adjusted for conciseness. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie
Anas Nashif
parent
39523f45c5
commit
a15be58019
2 changed files with 90 additions and 109 deletions
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@ -61,13 +61,6 @@ static struct k_spinlock x86_mmu_lock;
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static sys_slist_t x86_domain_list;
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#endif
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/* "dummy" pagetables for the first-phase build. The real page tables
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* are produced by gen-mmu.py based on data read in zephyr-prebuilt.elf,
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* and this dummy array is discarded.
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*/
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Z_GENERIC_SECTION(.dummy_pagetables)
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char z_x86_dummy_pagetables[Z_X86_INITIAL_PAGETABLE_SIZE];
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/*
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* Definitions for building an ontology of paging levels and capabilities
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* at each level
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@ -178,6 +171,96 @@ static const struct paging_level paging_levels[] = {
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#define NUM_LEVELS ARRAY_SIZE(paging_levels)
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/*
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* Macros for reserving space for page tables
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*
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* We need to reserve a block of memory equal in size to the page tables
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* generated by gen_mmu.py so that memory addresses do not shift between
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* build phases. These macros ultimately specify INITIAL_PAGETABLE_SIZE.
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*/
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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#ifdef CONFIG_X86_64
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#define NUM_PML4_ENTRIES 512U
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#define NUM_PDPT_ENTRIES 512U
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#else
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#define NUM_PDPT_ENTRIES 4U
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#endif /* CONFIG_X86_64 */
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#define NUM_PD_ENTRIES 512U
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#define NUM_PT_ENTRIES 512U
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#else
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#define NUM_PD_ENTRIES 1024U
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#define NUM_PT_ENTRIES 1024U
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#endif /* !CONFIG_X86_64 && !CONFIG_X86_PAE */
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/* Memory range covered by an instance of various table types */
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#define PT_AREA ((uintptr_t)(CONFIG_MMU_PAGE_SIZE * NUM_PT_ENTRIES))
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#define PD_AREA (PT_AREA * NUM_PD_ENTRIES)
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#ifdef CONFIG_X86_64
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#define PDPT_AREA (PD_AREA * NUM_PDPT_ENTRIES)
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#endif
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#define VM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
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#define VM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
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/* Define a range [PT_START, PT_END) which is the memory range
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* covered by all the page tables needed for system RAM
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*/
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#define PT_START ((uintptr_t)ROUND_DOWN(VM_ADDR, PT_AREA))
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#define PT_END ((uintptr_t)ROUND_UP(VM_ADDR + VM_SIZE, PT_AREA))
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/* Number of page tables needed to cover system RAM. Depends on the specific
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* bounds of system RAM, but roughly 1 page table per 2MB of RAM
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*/
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#define NUM_PT ((PT_END - PT_START) / PT_AREA)
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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/* Same semantics as above, but for the page directories needed to cover
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* system RAM.
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*/
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#define PD_START ((uintptr_t)ROUND_DOWN(VM_ADDR, PD_AREA))
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#define PD_END ((uintptr_t)ROUND_UP(VM_ADDR + VM_SIZE, PD_AREA))
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/* Number of page directories needed to cover system RAM. Depends on the
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* specific bounds of system RAM, but roughly 1 page directory per 1GB of RAM
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*/
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#define NUM_PD ((PD_END - PD_START) / PD_AREA)
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#else
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/* 32-bit page tables just have one toplevel page directory */
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#define NUM_PD 1
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#endif
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#ifdef CONFIG_X86_64
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/* Same semantics as above, but for the page directory pointer tables needed
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* to cover system RAM. On 32-bit there is just one 4-entry PDPT.
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*/
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#define PDPT_START ((uintptr_t)ROUND_DOWN(VM_ADDR, PDPT_AREA))
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#define PDPT_END ((uintptr_t)ROUND_UP(VM_ADDR + VM_SIZE, PDPT_AREA))
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/* Number of PDPTs needed to cover system RAM. Depends on the
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* specific bounds of system RAM, but roughly 1 PDPT per 512GB of RAM
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*/
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#define NUM_PDPT ((PDPT_END - PDPT_START) / PDPT_AREA)
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/* All pages needed for page tables, using computed values plus one more for
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* the top-level PML4
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*/
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#define NUM_TABLE_PAGES (NUM_PT + NUM_PD + NUM_PDPT + 1)
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#else /* !CONFIG_X86_64 */
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/* Number of pages we need to reserve in the stack for per-thread page tables */
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#define NUM_TABLE_PAGES (NUM_PT + NUM_PD)
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_PAE
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/* Toplevel PDPT wasn't included as it is not a page in size */
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#define INITIAL_PTABLE_SIZE ((NUM_TABLE_PAGES * CONFIG_MMU_PAGE_SIZE) + 0x20)
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#else
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#define INITIAL_PTABLE_SIZE (NUM_TABLE_PAGES * CONFIG_MMU_PAGE_SIZE)
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#endif
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/* "dummy" pagetables for the first-phase build. The real page tables
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* are produced by gen-mmu.py based on data read in zephyr-prebuilt.elf,
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* and this dummy array is discarded.
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*/
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Z_GENERIC_SECTION(.dummy_pagetables)
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static __used char dummy_pagetables[INITIAL_PTABLE_SIZE];
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/*
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* Utility functions
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*/
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@ -10,108 +10,6 @@
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#include <sys/util.h>
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/* Macros for reserving space for page tables
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*
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* Z_X86_NUM_TABLE_PAGES. In order to produce a set of page tables which has
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* virtual mappings for all system RAM, Z_X86_NUM_TABLE_PAGES is the number of
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* memory pages required. If CONFIG_X86_PAE is enabled, an additional 0x20
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* bytes are required for the toplevel 4-entry PDPT.
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*
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* Z_X86_INITIAL_PAGETABLE_SIZE is the total amount of memory in bytes
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* required, for any paging mode.
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*
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* These macros are currently used for two purposes:
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* - Reserving memory in the stack for thread-level page tables (slated
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* for eventual removal when USERSPACE is reworked to fully utilize
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* virtual memory and page tables are maintained at the process level)
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* - Reserving room for dummy pagetable memory for the first link, so that
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* memory addresses are not disturbed by the insertion of the real page
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* tables created by gen_mmu.py in the second link phase.
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*/
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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#ifdef CONFIG_X86_64
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#define Z_X86_NUM_PML4_ENTRIES 512U
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#define Z_X86_NUM_PDPT_ENTRIES 512U
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#else
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#define Z_X86_NUM_PDPT_ENTRIES 4U
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#endif /* CONFIG_X86_64 */
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#define Z_X86_NUM_PD_ENTRIES 512U
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#define Z_X86_NUM_PT_ENTRIES 512U
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#else
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#define Z_X86_NUM_PD_ENTRIES 1024U
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#define Z_X86_NUM_PT_ENTRIES 1024U
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#endif /* !CONFIG_X86_64 && !CONFIG_X86_PAE */
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/* Memory range covered by an instance of various table types */
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#define Z_X86_PT_AREA ((uintptr_t)(CONFIG_MMU_PAGE_SIZE * \
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Z_X86_NUM_PT_ENTRIES))
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#define Z_X86_PD_AREA (Z_X86_PT_AREA * Z_X86_NUM_PD_ENTRIES)
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#ifdef CONFIG_X86_64
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#define Z_X86_PDPT_AREA (Z_X86_PD_AREA * Z_X86_NUM_PDPT_ENTRIES)
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#endif
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#define PHYS_RAM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
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#define PHYS_RAM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
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/* Define a range [Z_X86_PT_START, Z_X86_PT_END) which is the memory range
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* covered by all the page tables needed for system RAM
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*/
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#define Z_X86_PT_START ((uintptr_t)ROUND_DOWN(PHYS_RAM_ADDR, Z_X86_PT_AREA))
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#define Z_X86_PT_END ((uintptr_t)ROUND_UP(PHYS_RAM_ADDR + PHYS_RAM_SIZE, \
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Z_X86_PT_AREA))
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/* Number of page tables needed to cover system RAM. Depends on the specific
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* bounds of system RAM, but roughly 1 page table per 2MB of RAM
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*/
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#define Z_X86_NUM_PT ((Z_X86_PT_END - Z_X86_PT_START) / Z_X86_PT_AREA)
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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/* Same semantics as above, but for the page directories needed to cover
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* system RAM.
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*/
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#define Z_X86_PD_START ((uintptr_t)ROUND_DOWN(PHYS_RAM_ADDR, Z_X86_PD_AREA))
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#define Z_X86_PD_END ((uintptr_t)ROUND_UP(PHYS_RAM_ADDR + PHYS_RAM_SIZE, \
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Z_X86_PD_AREA))
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/* Number of page directories needed to cover system RAM. Depends on the
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* specific bounds of system RAM, but roughly 1 page directory per 1GB of RAM
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*/
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#define Z_X86_NUM_PD ((Z_X86_PD_END - Z_X86_PD_START) / Z_X86_PD_AREA)
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#else
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/* 32-bit page tables just have one toplevel page directory */
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#define Z_X86_NUM_PD 1
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#endif
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#ifdef CONFIG_X86_64
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/* Same semantics as above, but for the page directory pointer tables needed
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* to cover system RAM. On 32-bit there is just one 4-entry PDPT.
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*/
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#define Z_X86_PDPT_START ((uintptr_t)ROUND_DOWN(PHYS_RAM_ADDR, \
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Z_X86_PDPT_AREA))
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#define Z_X86_PDPT_END ((uintptr_t)ROUND_UP(PHYS_RAM_ADDR + PHYS_RAM_SIZE, \
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Z_X86_PDPT_AREA))
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/* Number of PDPTs needed to cover system RAM. Depends on the
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* specific bounds of system RAM, but roughly 1 PDPT per 512GB of RAM
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*/
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#define Z_X86_NUM_PDPT ((Z_X86_PDPT_END - Z_X86_PDPT_START) / Z_X86_PDPT_AREA)
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/* All pages needed for page tables, using computed values plus one more for
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* the top-level PML4
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*/
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#define Z_X86_NUM_TABLE_PAGES (Z_X86_NUM_PT + Z_X86_NUM_PD + \
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Z_X86_NUM_PDPT + 1)
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#else /* !CONFIG_X86_64 */
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/* Number of pages we need to reserve in the stack for per-thread page tables */
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#define Z_X86_NUM_TABLE_PAGES (Z_X86_NUM_PT + Z_X86_NUM_PD)
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_PAE
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/* Toplevel PDPT wasn't included as it is not a page in size */
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#define Z_X86_INITIAL_PAGETABLE_SIZE ((Z_X86_NUM_TABLE_PAGES * \
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CONFIG_MMU_PAGE_SIZE) + 0x20)
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#else
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#define Z_X86_INITIAL_PAGETABLE_SIZE (Z_X86_NUM_TABLE_PAGES * \
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CONFIG_MMU_PAGE_SIZE)
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#endif
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/*
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* K_MEM_PARTITION_* defines
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*
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