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linker: warn about orphan sections

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This adds a linker flag and necessary changes to linker scripts
so that linker will warn about orphan sections.

Relates to #5534.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2018-10-08 10:43:07 -07:00 • committed by Anas Nashif
commit 8ce758a8ff
25 changed files with 397 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

7
CMakeLists.txt
View file

@ -287,6 +287,13 @@ zephyr_ld_options(
${LINKERFLAGPREFIX},--build-id=none
)
# Funny thing is if this is set to =error, some architectures will
# skip this flag even though the compiler flag check passes
# (e.g. ARC and Xtensa). So keep it at =warn, for now.
zephyr_ld_options(
${LINKERFLAGPREFIX},--orphan-handling=warn
)
if(CONFIG_HAVE_CUSTOM_LINKER_SCRIPT)
set(LINKER_SCRIPT ${APPLICATION_SOURCE_DIR}/${CONFIG_CUSTOM_LINKER_SCRIPT})
if(NOT EXISTS ${LINKER_SCRIPT})

6
include/arch/arc/v2/linker.ld
View file

@ -73,6 +73,9 @@ MEMORY {
}
SECTIONS {
#include <linker/rel-sections.ld>
GROUP_START(ROMABLE_REGION)
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,ALIGN(1024)) {
@ -283,4 +286,7 @@ SECTIONS {
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
}

45
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -87,6 +87,23 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to 'arm-zephyr-elf-ld --verbose',
* before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROMABLE_REGION)
_image_rom_start = ROM_ADDR;
@ -133,6 +150,12 @@ SECTIONS
*(".text.*")
*(.gnu.linkonce.t.*)
/*
* These are here according to 'arm-zephyr-elf-ld --verbose',
* after .gnu.linkonce.t.*
*/
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
#include <linker/priv_stacks-text.ld>
#include <linker/kobject-text.ld>
@ -219,6 +242,18 @@ SECTIONS
} > FLASH_CCFG
#endif
/*
* These are here according to 'arm-zephyr-elf-ld --verbose',
* before data section.
*/
SECTION_PROLOGUE(.got,,)
{
*(.got.plt)
*(.igot.plt)
*(.got)
*(.igot)
}
GROUP_START(RAMABLE_REGION)
@ -319,6 +354,8 @@ SECTIONS
KERNEL_INPUT_SECTION(COMMON)
*(".kernel_bss.*")
#include <linker/priv_stacks-noinit.ld>
/*
* As memory is cleared in words only, it is simpler to ensure the BSS
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
@ -427,4 +464,12 @@ SECTIONS
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
SECTION_PROLOGUE(.ARM.attributes, 0,)
{
KEEP(*(.ARM.attributes))
KEEP(*(.gnu.attributes))
}
}

19
include/arch/nios2/linker.ld
View file

@ -82,6 +82,23 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to
* 'nios2-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROMABLE_REGION)
_image_rom_start = _ROM_ADDR;
@ -261,5 +278,7 @@ SECTIONS
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
}

27
include/arch/posix/linker.ld
View file

@ -21,16 +21,43 @@
#include <linker/linker-defs.h>
#include <linker/linker-tool.h>
SECTIONS
{
SECTION_PROLOGUE(.note.ABI-tag,,)
{
*(.note.ABI-tag)
}
} INSERT AFTER .interp;
SECTIONS
{
#include <linker/rel-sections.ld>
#include <linker/common-rom.ld>
#include <linker/common-ram.ld>
SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
{
/*
* This section is used for non-initialized objects that
* will not be cleared during the boot process.
*/
KERNEL_INPUT_SECTION(.noinit)
KERNEL_INPUT_SECTION(".noinit.*")
*(".kernel_noinit.*")
}
#include <arch/posix/native_tasks.ld>
/* Related to transactional memory */
SECTION_PROLOGUE(.tm_clone_table,,)
{
*(.tm_clone_table)
}
__data_ram_end = .;
} INSERT AFTER .data;

19
include/arch/riscv32/common/linker.ld
View file

@ -46,6 +46,22 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* The .plt and .iplt are here according to
* 'riscv32-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(ROM)
_image_rom_start = .;
@ -175,4 +191,7 @@ SECTIONS
#endif
GROUP_END(RAMABLE_REGION)
#include <linker/debug-sections.ld>
}

21
include/arch/riscv32/pulpino/linker.ld
View file

@ -41,6 +41,23 @@ ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS
{
#include <linker/rel-sections.ld>
/*
* .plt and .iplt are here according to
* 'riscv32-zephyr-elf-ld --verbose', before text section.
*/
SECTION_PROLOGUE(.plt,,)
{
*(.plt)
}
SECTION_PROLOGUE(.iplt,,)
{
*(.iplt)
}
GROUP_START(INSTRRAM)
SECTION_PROLOGUE(_VECTOR_SECTION_NAME,,)
@ -71,6 +88,7 @@ SECTIONS
*(.text)
*(".text.*")
*(.gnu.linkonce.t.*)
*(.eh_frame)
} GROUP_LINK_IN(INSTRRAM)
_image_text_end = .;
@ -160,4 +178,7 @@ SECTIONS
#endif
GROUP_END(RAMABLE_REGION)
#include <linker/debug-sections.ld>
}

5
include/arch/x86/linker.ld
View file

@ -66,6 +66,9 @@ ENTRY(CONFIG_KERNEL_ENTRY)
/* SECTIONS definitions */
SECTIONS
{
#include <linker/rel-sections.ld>
GROUP_START(ROMABLE_REGION)
#ifdef CONFIG_REALMODE
/* 16-bit sections */
@ -378,6 +381,8 @@ SECTIONS
#include <custom-sections.ld>
#endif
#include <linker/debug-sections.ld>
}
#ifdef CONFIG_XIP

40
include/linker/debug-sections.ld Normal file
View file

@ -0,0 +1,40 @@
/* following sections are obtained via 'ld --verbose' */
/* Stabs debugging sections. */
SECTION_PROLOGUE(.stab, 0,) { *(.stab) }
SECTION_PROLOGUE(.stabstr, 0,) { *(.stabstr) }
SECTION_PROLOGUE(.stab.excl, 0,) { *(.stab.excl) }
SECTION_PROLOGUE(.stab.exclstr, 0,) { *(.stab.exclstr) }
SECTION_PROLOGUE(.stab.index, 0,) { *(.stab.index) }
SECTION_PROLOGUE(.stab.indexstr, 0,) { *(.stab.indexstr) }
SECTION_PROLOGUE(.comment, 0,) { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
SECTION_PROLOGUE(.debug, 0,) { *(.debug) }
SECTION_PROLOGUE(.line, 0,) { *(.line) }
/* GNU DWARF 1 extensions */
SECTION_PROLOGUE(.debug_srcinfo, 0,) { *(.debug_srcinfo) }
SECTION_PROLOGUE(.debug_sfnames, 0,) { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
SECTION_PROLOGUE(.debug_aranges, 0,) { *(.debug_aranges) }
SECTION_PROLOGUE(.debug_pubnames, 0,) { *(.debug_pubnames) }
/* DWARF 2 */
SECTION_PROLOGUE(.debug_info, 0,) { *(.debug_info .gnu.linkonce.wi.*) }
SECTION_PROLOGUE(.debug_abbrev, 0,) { *(.debug_abbrev) }
SECTION_PROLOGUE(.debug_line, 0,) { *(.debug_line .debug_line.* .debug_line_end ) }
SECTION_PROLOGUE(.debug_frame, 0,) { *(.debug_frame) }
SECTION_PROLOGUE(.debug_str, 0,) { *(.debug_str) }
SECTION_PROLOGUE(.debug_loc, 0,) { *(.debug_loc) }
SECTION_PROLOGUE(.debug_macinfo, 0,) { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
SECTION_PROLOGUE(.debug_weaknames, 0,) { *(.debug_weaknames) }
SECTION_PROLOGUE(.debug_funcnames, 0,) { *(.debug_funcnames) }
SECTION_PROLOGUE(.debug_typenames, 0,) { *(.debug_typenames) }
SECTION_PROLOGUE(.debug_varnames, 0,) { *(.debug_varnames) }
/* DWARF 3 */
SECTION_PROLOGUE(.debug_pubtypes, 0,) { *(.debug_pubtypes) }
SECTION_PROLOGUE(.debug_ranges, 0,) { *(.debug_ranges) }
/* DWARF Extension. */
SECTION_PROLOGUE(.debug_macro, 0,) { *(.debug_macro) }

7
include/linker/priv_stacks-noinit.ld Normal file
View file

@ -0,0 +1,7 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
*(".priv_stacks.noinit")

124
include/linker/rel-sections.ld Normal file
View file

@ -0,0 +1,124 @@
/*
* .rel.* are for relocation.
* These are being produced by compiler/linker.
* Specify these here so they are not considered orphan sections.
*
* Obtained via
* '$(ARCH)-zephyr-elf-ld --verbose'
*/
#if !defined(CONFIG_RISCV32) && !defined(CONFIG_XTENSA)
SECTION_PROLOGUE(.rel.dyn,,)
{
*(.rel.init)
*(.rel.text .rel.text.* .rel.text_start.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
#if defined(CONFIG_ARCH_POSIX)
*(.rel.preinit_array)
*(.rel.init_array)
*(.rel.fini_array)
#endif
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
#endif
/* These are related to sections defined by Zephyr */
*(.rel.kernel .rel.kernel.*)
*(.rel.init_PRE_KERNEL*)
*(.rel.init_POST_KERNEL*)
*(.rel.init_APPLICATION*)
#if defined(CONFIG_ARCH_POSIX)
*(.rel.native_PRE_BOOT*)
*(.rel.native_FIRST_SLEEP*)
*(.rel.native_ON_EXIT*)
#endif
*(.rel.devconfig.*)
*(.rel._k_alert.*)
*(.rel._k_mem_pool.*)
*(.rel._k_timer.*)
*(.rel._static_thread_data.*)
#if defined(CONFIG_X86)
*(.rel.ifunc)
*(.rel.mmulist)
*(.rel.tss)
#endif
}
#endif /* !defined(CONFIG_RISCV32) */
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2) || defined(CONFIG_RISCV32)
SECTION_PROLOGUE(.rela.dyn,,)
{
*(.rela.init)
*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
*(.rela.fini)
*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
*(.rela.ctors)
*(.rela.dtors)
*(.rela.got)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2)
PROVIDE_HIDDEN (__rela_iplt_start = .);
*(.rela.iplt)
PROVIDE_HIDDEN (__rela_iplt_end = .);
#endif
/* These are related to sections defined by Zephyr */
*(.rela.kernel .rel.kernel.*)
*(.rela.init_PRE_KERNEL*)
*(.rela.init_POST_KERNEL*)
*(.rela.init_APPLICATION*)
*(.rela._k_alert.*)
*(.rela._k_mem_pool.*)
*(.rela._k_timer.*)
*(.rela._static_thread_data.*)
#if defined(CONFIG_RISCV32)
*(.rela.devconfig.*)
*(.rela.exception.*)
*(.rela.gnu.linkonce.sw_isr_table)
*(.rela.sdata.*)
#endif
}
#endif
#if !defined(CONFIG_RISCV32) && !defined(CONFIG_XTENSA)
SECTION_PROLOGUE(.rel.plt,,)
{
*(.rel.plt)
#if defined(CONFIG_X86)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
#endif
}
#endif /* !defined(CONFIG_RISCV32) */
#if defined(CONFIG_ARM) || defined(CONFIG_NIOS2) || defined(CONFIG_RISCV32)
SECTION_PROLOGUE(.rela.plt,,)
{
*(.rela.plt)
}
#endif

5
soc/xtensa/D_108mini/linker.ld
View file

@ -178,6 +178,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -563,6 +565,7 @@ SECTIONS
} >sram0_seg :sram0_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -580,6 +583,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/D_212GP/linker.ld
View file

@ -178,6 +178,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
@ -569,6 +571,7 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -586,6 +589,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/D_233L/linker.ld
View file

@ -159,6 +159,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.WindowVectors.text : ALIGN(4)
{
_WindowVectors_text_start = ABSOLUTE(.);
@ -470,6 +472,7 @@ SECTIONS
_memmap_seg_srom1_end = ALIGN(0x8);
_image_rom_end = ABSOLUTE(.);
} >srom1_seg :srom1_phdr
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -487,6 +490,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/XRC_D2PM_5swIrq/linker.ld
View file

@ -178,6 +178,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -573,6 +575,7 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -590,6 +593,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/XRC_FUSION_AON_ALL_LM/linker.ld
View file

@ -120,6 +120,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -402,6 +404,7 @@ SECTIONS
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -419,6 +422,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

11
soc/xtensa/esp32/linker.ld
View file

@ -64,6 +64,9 @@ PROVIDE(_memmap_reset_vector = 0x40000400);
SECTIONS
{
#include <linker/rel-sections.ld>
/* RTC fast memory holds RTC wake stub code,
including from any source file named rtc_wake_stub*.c
*/
@ -241,4 +244,12 @@ SECTIONS
#ifdef CONFIG_GEN_ISR_TABLES
#include <linker/intlist.ld>
#endif
#include <linker/debug-sections.ld>
SECTION_PROLOGUE(.xtensa.info, 0,)
{
*(.xtensa.info)
}
}

5
soc/xtensa/hifi2_std/linker.ld
View file

@ -178,6 +178,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -573,6 +575,7 @@ SECTIONS
} >sram19_seg :sram19_bss_phdr
PROVIDE(__stack = 0x64000000);
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -590,6 +593,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi3_bd5/linker.ld
View file

@ -118,6 +118,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -349,6 +351,7 @@ SECTIONS
} >sram9_seg :sram9_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -366,6 +369,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi3_bd5_call0/linker.ld
View file

@ -118,6 +118,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -349,6 +351,7 @@ SECTIONS
} >sram9_seg :sram9_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -366,6 +369,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi4_bd7/linker.ld
View file

@ -133,6 +133,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_image_rom_start = ABSOLUTE(.);
@ -396,6 +398,7 @@ SECTIONS
} >sram13_seg :sram13_bss_phdr
__stack = 0x60400000;
_heap_sentry = 0x60400000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -413,6 +416,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi_mini/linker.ld
View file

@ -105,6 +105,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -321,6 +323,7 @@ SECTIONS
_etext = .;
} >iram0_7_seg :iram0_7_phdr
_image_text_end = .;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -338,6 +341,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/hifi_mini_4swIrq/linker.ld
View file

@ -105,6 +105,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram0.rodata : ALIGN(4)
{
_dram0_rodata_start = ABSOLUTE(.);
@ -321,6 +323,7 @@ SECTIONS
_etext = .;
} >iram0_7_seg :iram0_7_phdr
_image_text_end = .;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -338,6 +341,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

6
soc/xtensa/intel_s1000/linker.ld
View file

@ -167,6 +167,9 @@ _memmap_cacheattr_intel_s1000 = 0xf2ff4242;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_intel_s1000);
SECTIONS
{
#include <linker/rel-sections.ld>
.ResetVector.text : ALIGN(4)
{
_ResetVector_text_start = ABSOLUTE(.);
@ -415,6 +418,7 @@ SECTIONS
_end = ALIGN(8);
PROVIDE(end = ALIGN(8));
__stack = L2_SRAM_BASE + L2_SRAM_SIZE;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -432,6 +436,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))

5
soc/xtensa/sample_controller/linker.ld
View file

@ -178,6 +178,8 @@ PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
#include <linker/rel-sections.ld>
.dram1.rodata : ALIGN(4)
{
_dram1_rodata_start = ABSOLUTE(.);
@ -563,6 +565,7 @@ SECTIONS
} >sram0_seg :sram0_bss_phdr
__stack = 0x64000000;
_heap_sentry = 0x64000000;
.comment 0 : { *(.comment) }
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
@ -580,6 +583,8 @@ SECTIONS
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.debug_ranges 0 : { *(.debug_ranges) }
.xtensa.info 0 : { *(.xtensa.info) }
.xt.insn 0 :
{
KEEP (*(.xt.insn))