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drivers: uart: stm32: Allow enabling FIFO mode

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Add required bits to allow FIFO mode enabling.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit is contained in:
Erwan Gouriou 2023-11-27 11:34:29 +01:00 • committed by Fabio Baltieri
commit 0c541d7ad0
3 changed files with 19 additions and 0 deletions
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7
drivers/serial/uart_stm32.c
View file

@ -1956,6 +1956,12 @@ static int uart_stm32_registers_configure(const struct device *dev)
} }
#endif #endif
#ifdef USART_CR1_FIFOEN
if (config->fifo_enable) {
LL_USART_EnableFIFO(config->usart);
}
#endif
LL_USART_Enable(config->usart); LL_USART_Enable(config->usart);
#ifdef USART_ISR_TEACK #ifdef USART_ISR_TEACK
@ -2334,6 +2340,7 @@ static const struct uart_stm32_config uart_stm32_cfg_##index = { \
.de_assert_time = DT_INST_PROP(index, de_assert_time), \ .de_assert_time = DT_INST_PROP(index, de_assert_time), \
.de_deassert_time = DT_INST_PROP(index, de_deassert_time), \ .de_deassert_time = DT_INST_PROP(index, de_deassert_time), \
.de_invert = DT_INST_PROP(index, de_invert), \ .de_invert = DT_INST_PROP(index, de_invert), \
.fifo_enable = DT_INST_PROP(index, fifo_enable), \
STM32_UART_IRQ_HANDLER_FUNC(index) \ STM32_UART_IRQ_HANDLER_FUNC(index) \
STM32_UART_PM_WAKEUP(index) \ STM32_UART_PM_WAKEUP(index) \
}; \ }; \

2
drivers/serial/uart_stm32.h
View file

@ -49,6 +49,8 @@ struct uart_stm32_config {
uint8_t de_deassert_time; uint8_t de_deassert_time;
/* enable de pin inversion */ /* enable de pin inversion */
bool de_invert; bool de_invert;
/* enable fifo */
bool fifo_enable;
/* pin muxing */ /* pin muxing */
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
#if defined(CONFIG_UART_INTERRUPT_DRIVEN) || defined(CONFIG_UART_ASYNC_API) || \ #if defined(CONFIG_UART_INTERRUPT_DRIVEN) || defined(CONFIG_UART_ASYNC_API) || \

10
dts/bindings/serial/st,stm32-uart-base.yaml
View file

@ -86,3 +86,13 @@ properties:
description: | description: |
Invert the binary logic of the de pin. When enabled, physical logic levels are inverted and Invert the binary logic of the de pin. When enabled, physical logic levels are inverted and
we use 1=Low, 0=High instead of 1=High, 0=Low. we use 1=Low, 0=High instead of 1=High, 0=Low.
fifo-enable:
type: boolean
description: |
Enables transmit and receive FIFO using default FIFO confugration (typically threasholds
set to 1/8).
In TX, FIFO allows to work in burst mode, easing scheduling of loaded applications. It also
allows more reliable communication with UART devices sensitive to variation of inter-frames
delays.
In RX, FIFO reduces overrun occurences.