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arm: stm32l4: Add configuration and dts for STM32L432XX

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Add configuration and dts for the STM32L432XX SoC STM32L4 variant.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit is contained in:
Neil Armstrong 2017-04-28 14:37:49 +02:00 • committed by Anas Nashif
commit 092be24061
4 changed files with 79 additions and 0 deletions
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20
arch/arm/soc/st_stm32/stm32l4/Kconfig.defconfig.stm32l432xx Normal file
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@ -0,0 +1,20 @@
# Kconfig - ST Microelectronics STM32L432KC MCU
#
# Copyright (c) 2016 Open-RnD Sp. z o.o.
# Copyright (c) 2016 BayLibre, SAS
#
# SPDX-License-Identifier: Apache-2.0
#
if SOC_STM32L432XX
config SOC
string
default stm32l432xx
config NUM_IRQS
int
default 82
endif # SOC_STM32L432XX

4
arch/arm/soc/st_stm32/stm32l4/Kconfig.soc
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@ -14,6 +14,10 @@ config SOC_STM32L476XX
bool "STM32L476XX"
select HAS_STM32CUBE
config SOC_STM32L432XX
bool "STM32L432XX"
select HAS_STM32CUBE
config SOC_STM32L475XG
bool "STM32L475XG"
select HAS_STM32CUBE

3
dts/arm/st/mem.h
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@ -39,6 +39,9 @@
#elif defined(CONFIG_SOC_STM32L476XX)
#define DT_FLASH_SIZE __SIZE_K(1024)
#define DT_SRAM_SIZE __SIZE_K(96)
#elif defined(CONFIG_SOC_STM32L432XX)
#define DT_FLASH_SIZE __SIZE_K(256)
#define DT_SRAM_SIZE __SIZE_K(64)
#else
#error "Flash and RAM sizes not defined for this chip"
#endif

52
dts/arm/st/stm32l432.dtsi Normal file
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@ -0,0 +1,52 @@
/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <st/mem.h>
/ {
flash0: flash {
reg = <0x08000000 DT_FLASH_SIZE>;
};
sram0: memory {
reg = <0x20000000 DT_SRAM_SIZE>;
};
soc {
usart1: uart@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
interrupts = <37 0>;
status = "disabled";
};
usart2: uart@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
interrupts = <38 0>;
status = "disabled";
};
usart3: uart@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
interrupts = <39 0>;
status = "disabled";
};
uart4: uart@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
interrupts = <52 0>;
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};