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qspi: stm32: Add support for 'reset-gpios' property in 'stm32-qspi-nor'

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Some flash memories connected to QUADSPI IP block on stm32[fh]7 devices
require proper reset pulse before configuration.

This patch adds two new properties - the 'reset-gpios' phandle,
which allows specifying GPIO pin for RESETn pulse and
'reset-gpios-duration', which provides the time (in ms) for reset
duration.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Lukasz Majewski 2021-11-30 10:31:32 +01:00 • committed by Anas Nashif
commit 07be9301b9
2 changed files with 35 additions and 0 deletions
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25
drivers/flash/flash_stm32_qspi.c
View file

@ -20,6 +20,10 @@
#include <drivers/dma.h> #include <drivers/dma.h>
#include <drivers/dma/dma_stm32.h> #include <drivers/dma/dma_stm32.h>
#define STM32_QSPI_RESET_GPIO DT_INST_NODE_HAS_PROP(0, reset_gpios)
#if STM32_QSPI_RESET_GPIO
#include <drivers/gpio.h>
#endif
#include <stm32_ll_dma.h> #include <stm32_ll_dma.h>
#include "spi_nor.h" #include "spi_nor.h"
@ -64,6 +68,9 @@ struct flash_stm32_qspi_config {
size_t flash_size; size_t flash_size;
uint32_t max_frequency; uint32_t max_frequency;
const struct pinctrl_dev_config *pcfg; const struct pinctrl_dev_config *pcfg;
#if STM32_QSPI_RESET_GPIO
const struct gpio_dt_spec reset;
#endif
}; };
struct flash_stm32_qspi_data { struct flash_stm32_qspi_data {
@ -642,6 +649,18 @@ static int spi_nor_process_bfp(const struct device *dev,
return 0; return 0;
} }
#if STM32_QSPI_RESET_GPIO
static void flash_stm32_qspi_gpio_reset(const struct device *dev)
{
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
/* Generate RESETn pulse for the flash memory */
gpio_pin_configure_dt(&dev_cfg->reset, GPIO_OUTPUT_ACTIVE);
k_msleep(DT_INST_PROP(0, reset_gpios_duration));
gpio_pin_set_dt(&dev_cfg->reset, 0);
}
#endif
static int flash_stm32_qspi_init(const struct device *dev) static int flash_stm32_qspi_init(const struct device *dev)
{ {
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
@ -657,6 +676,9 @@ static int flash_stm32_qspi_init(const struct device *dev)
return ret; return ret;
} }
#if STM32_QSPI_RESET_GPIO
flash_stm32_qspi_gpio_reset(dev);
#endif
#if STM32_QSPI_USE_DMA #if STM32_QSPI_USE_DMA
/* /*
* DMA configuration * DMA configuration
@ -877,6 +899,9 @@ static const struct flash_stm32_qspi_config flash_stm32_qspi_cfg = {
.flash_size = DT_INST_PROP(0, size) / 8U, .flash_size = DT_INST_PROP(0, size) / 8U,
.max_frequency = DT_INST_PROP(0, qspi_max_frequency), .max_frequency = DT_INST_PROP(0, qspi_max_frequency),
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(STM32_QSPI_NODE), .pcfg = PINCTRL_DT_DEV_CONFIG_GET(STM32_QSPI_NODE),
#if STM32_QSPI_RESET_GPIO
.reset = GPIO_DT_SPEC_INST_GET(0, reset_gpios),
#endif
}; };
static struct flash_stm32_qspi_data flash_stm32_qspi_dev_data = { static struct flash_stm32_qspi_data flash_stm32_qspi_dev_data = {

10
dts/bindings/flash_controller/st,stm32-qspi-nor.yaml
View file

@ -12,6 +12,8 @@ description: |
reg = <0>; reg = <0>;
qspi-max-frequency = <80000000>; qspi-max-frequency = <80000000>;
size = <0x4000000>; size = <0x4000000>;
reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
reset-gpios-duration = <1>;
status = "okay"; status = "okay";
}; };
@ -33,3 +35,11 @@ properties:
size: size:
required: true required: true
description: Flash Memory size in bits description: Flash Memory size in bits
reset-gpios:
type: phandle-array
required: false
description: RESETn pin
reset-gpios-duration:
type: int
required: false
description: The duration (in ms) for the flash memory reset pulse