drivers: esp32: UART Fix yaml/dts binding name
replace "xtensa" with "espressif", as the latter is the correct vendor name. Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
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2d035c4191
commit
0705be344c
4 changed files with 19 additions and 23 deletions
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@ -476,7 +476,7 @@ static const struct uart_driver_api uart_esp32_api = {
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ESP32_UART_IRQ_HANDLER_DECL(idx); \
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ESP32_UART_IRQ_HANDLER_DECL(idx); \
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static const struct uart_esp32_config uart_esp32_cfg_port_##idx = { \
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static const struct uart_esp32_config uart_esp32_cfg_port_##idx = { \
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.dev_conf = { \
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.dev_conf = { \
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.base = (u8_t *)DT_INST_##idx##_XTENSA_ESP32_UART_BASE_ADDRESS, \
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.base = (u8_t *)DT_INST_##idx##_ESPRESSIF_ESP32_UART_BASE_ADDRESS, \
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.sys_clk_freq = DT_INST_0_CADENCE_TENSILICA_XTENSA_LX6_CLOCK_FREQUENCY, \
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.sys_clk_freq = DT_INST_0_CADENCE_TENSILICA_XTENSA_LX6_CLOCK_FREQUENCY, \
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ESP32_UART_IRQ_HANDLER_FUNC(idx) \
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ESP32_UART_IRQ_HANDLER_FUNC(idx) \
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}, \
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}, \
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@ -494,10 +494,10 @@ static const struct uart_esp32_config uart_esp32_cfg_port_##idx = { \
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}, \
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}, \
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\
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\
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.pins = { \
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.pins = { \
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.tx = DT_INST_##idx##_XTENSA_ESP32_UART_TX_PIN, \
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.tx = DT_INST_##idx##_ESPRESSIF_ESP32_UART_TX_PIN, \
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.rx = DT_INST_##idx##_XTENSA_ESP32_UART_RX_PIN, \
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.rx = DT_INST_##idx##_ESPRESSIF_ESP32_UART_RX_PIN, \
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.rts = DT_INST_##idx##_XTENSA_ESP32_UART_RTS_PIN, \
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.rts = DT_INST_##idx##_ESPRESSIF_ESP32_UART_RTS_PIN, \
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.cts = DT_INST_##idx##_XTENSA_ESP32_UART_CTS_PIN, \
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.cts = DT_INST_##idx##_ESPRESSIF_ESP32_UART_CTS_PIN, \
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}, \
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}, \
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\
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\
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.irq = { \
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.irq = { \
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@ -508,7 +508,7 @@ static const struct uart_esp32_config uart_esp32_cfg_port_##idx = { \
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\
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\
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static struct uart_esp32_data uart_esp32_data_##idx = { \
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static struct uart_esp32_data uart_esp32_data_##idx = { \
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.uart_config = { \
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.uart_config = { \
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.baudrate = DT_INST_##idx##_XTENSA_ESP32_UART_CURRENT_SPEED, \
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.baudrate = DT_INST_##idx##_ESPRESSIF_ESP32_UART_CURRENT_SPEED, \
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.parity = UART_CFG_PARITY_NONE, \
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.parity = UART_CFG_PARITY_NONE, \
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.stop_bits = UART_CFG_STOP_BITS_1, \
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.stop_bits = UART_CFG_STOP_BITS_1, \
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.data_bits = UART_CFG_DATA_BITS_8, \
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.data_bits = UART_CFG_DATA_BITS_8, \
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@ -517,7 +517,7 @@ static struct uart_esp32_data uart_esp32_data_##idx = { \
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}; \
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}; \
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\
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\
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DEVICE_AND_API_INIT(uart_esp32_##idx, \
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DEVICE_AND_API_INIT(uart_esp32_##idx, \
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DT_INST_##idx##_XTENSA_ESP32_UART_LABEL, \
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DT_INST_##idx##_ESPRESSIF_ESP32_UART_LABEL, \
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uart_esp32_init, \
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uart_esp32_init, \
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&uart_esp32_data_##idx, \
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&uart_esp32_data_##idx, \
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&uart_esp32_cfg_port_##idx, \
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&uart_esp32_cfg_port_##idx, \
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@ -527,14 +527,14 @@ DEVICE_AND_API_INIT(uart_esp32_##idx, \
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\
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\
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ESP32_UART_IRQ_HANDLER(idx)
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ESP32_UART_IRQ_HANDLER(idx)
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#ifdef DT_INST_0_XTENSA_ESP32_UART
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#ifdef DT_INST_0_ESPRESSIF_ESP32_UART
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ESP32_UART_INIT(0);
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ESP32_UART_INIT(0);
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#endif
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#endif
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#ifdef DT_INST_1_XTENSA_ESP32_UART
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#ifdef DT_INST_1_ESPRESSIF_ESP32_UART
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ESP32_UART_INIT(1);
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ESP32_UART_INIT(1);
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#endif
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#endif
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#ifdef DT_INST_2_XTENSA_ESP32_UART
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#ifdef DT_INST_2_ESPRESSIF_ESP32_UART
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ESP32_UART_INIT(2);
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ESP32_UART_INIT(2);
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#endif
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#endif
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@ -3,7 +3,7 @@ title: ESP32 Uart
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description: >
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description: >
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This binding gives a base representation of the ESP32 UART
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This binding gives a base representation of the ESP32 UART
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compatible: "xtensa,esp32-uart"
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compatible: "espressif,esp32-uart"
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include: uart-controller.yaml
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include: uart-controller.yaml
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@ -12,27 +12,24 @@ properties:
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required: true
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required: true
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interrupts:
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interrupts:
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category: optional
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required: false
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clocks:
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category: required
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tx-pin:
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tx-pin:
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type: int
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type: int
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description: TX pin
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description: TX pin
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category: required
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required: true
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rx-pin:
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rx-pin:
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type: int
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type: int
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description: RX pin
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description: RX pin
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category: required
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required: true
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rts-pin:
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rts-pin:
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type: int
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type: int
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description: RTS pin
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description: RTS pin
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category: optional
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required: false
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cts-pin:
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cts-pin:
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type: int
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type: int
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description: CTS pin
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description: CTS pin
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category: optional
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required: false
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@ -454,7 +454,6 @@ x-powers X-Powers
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xes Extreme Engineering Solutions (X-ES)
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xes Extreme Engineering Solutions (X-ES)
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xillybus Xillybus Ltd.
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xillybus Xillybus Ltd.
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xlnx Xilinx
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xlnx Xilinx
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xtensa The Tensilica Xtensa processor architecture
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xunlong Shenzhen Xunlong Software CO.,Limited
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xunlong Shenzhen Xunlong Software CO.,Limited
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ysoft Y Soft Corporation a.s.
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ysoft Y Soft Corporation a.s.
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zarlink Zarlink Semiconductor
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zarlink Zarlink Semiconductor
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@ -32,7 +32,7 @@
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soc {
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soc {
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uart0: uart@3ff40000 {
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uart0: uart@3ff40000 {
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compatible = "xtensa,esp32-uart";
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compatible = "espressif,esp32-uart";
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reg = <0x3ff40000 0x400>;
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reg = <0x3ff40000 0x400>;
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/* interrupts = <12>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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/* interrupts = <12>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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label = "UART_0";
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label = "UART_0";
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@ -40,7 +40,7 @@
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};
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};
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uart1: uart@3ff50000 {
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uart1: uart@3ff50000 {
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compatible = "xtensa,esp32-uart";
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compatible = "espressif,esp32-uart";
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reg = <0x3ff50000 0x400>;
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reg = <0x3ff50000 0x400>;
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/* interrupts = <17>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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/* interrupts = <17>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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label = "UART_1";
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label = "UART_1";
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@ -48,7 +48,7 @@
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};
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};
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uart2: uart@3ff6e000 {
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uart2: uart@3ff6e000 {
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compatible = "xtensa,esp32-uart";
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compatible = "espressif,esp32-uart";
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reg = <0x3ff6E000 0x400>;
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reg = <0x3ff6E000 0x400>;
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/* interrupts = <18>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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/* interrupts = <18>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */
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label = "UART_2";
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label = "UART_2";
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