uart/stm32: add STM32F3X support for uart
Change-Id: I9796c6a2841c972eeab15894a6d7f38ae93606d1 Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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726d11a5a2
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5 changed files with 27 additions and 2 deletions
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@ -55,6 +55,9 @@ static int stm32f3_init(struct device *arg)
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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SystemCoreClock = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
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return 0;
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}
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@ -58,6 +58,10 @@ enum stm32f3x_pin_config_mode {
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#include "soc_irq.h"
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#ifdef CONFIG_SERIAL_HAS_DRIVER
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#include <stm32f3xx_ll_usart.h>
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#endif
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32F3_SOC_H_ */
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@ -286,7 +286,9 @@ static int uart_stm32_init(struct device *dev)
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__uart_stm32_get_clock(dev);
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/* enable clock */
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#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
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#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
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defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X)
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clock_control_on(data->clock, config->clock_subsys);
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#elif defined(CONFIG_SOC_SERIES_STM32F4X)
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clock_control_on(data->clock,
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@ -325,6 +327,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
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},
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
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#elif CONFIG_SOC_SERIES_STM32F3X
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.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART1),
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#elif CONFIG_SOC_SERIES_STM32F4X
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.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
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.enr = STM32F4X_CLOCK_ENABLE_USART1 },
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@ -350,6 +354,8 @@ static void uart_stm32_irq_config_func_1(struct device *dev)
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{
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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#define PORT_1_IRQ STM32F1_IRQ_USART1
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#elif CONFIG_SOC_SERIES_STM32F3X
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#define PORT_1_IRQ STM32F3_IRQ_USART1
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#elif CONFIG_SOC_SERIES_STM32F4X
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#define PORT_1_IRQ STM32F4_IRQ_USART1
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#elif CONFIG_SOC_SERIES_STM32L4X
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@ -381,6 +387,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
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},
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
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#elif CONFIG_SOC_SERIES_STM32F3X
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.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART2),
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#elif CONFIG_SOC_SERIES_STM32F4X
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.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
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.enr = STM32F4X_CLOCK_ENABLE_USART2 },
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@ -406,6 +414,8 @@ static void uart_stm32_irq_config_func_2(struct device *dev)
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{
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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#define PORT_2_IRQ STM32F1_IRQ_USART2
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#elif CONFIG_SOC_SERIES_STM32F3X
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#define PORT_2_IRQ STM32F3_IRQ_USART2
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#elif CONFIG_SOC_SERIES_STM32F4X
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#define PORT_2_IRQ STM32F4_IRQ_USART2
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#elif CONFIG_SOC_SERIES_STM32L4X
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@ -437,6 +447,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
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},
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
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#elif CONFIG_SOC_SERIES_STM32F3X
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.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART3),
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#elif CONFIG_SOC_SERIES_STM32F4X
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.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
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#elif CONFIG_SOC_SERIES_STM32L4X
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@ -461,6 +473,8 @@ static void uart_stm32_irq_config_func_3(struct device *dev)
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{
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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#define PORT_3_IRQ STM32F1_IRQ_USART3
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#elif CONFIG_SOC_SERIES_STM32F3X
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#define PORT_3_IRQ STM32F3_IRQ_USART3
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#elif CONFIG_SOC_SERIES_STM32F4X
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#define PORT_3_IRQ STM32F4_IRQ_USART3
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#elif CONFIG_SOC_SERIES_STM32L4X
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@ -16,7 +16,9 @@
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struct uart_stm32_config {
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struct uart_device_config uconf;
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/* clock subsystem driving this peripheral */
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#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
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#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
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defined(CONFIG_SOC_SERIES_STM32F3X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X)
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clock_control_subsys_t clock_subsys;
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#elif defined(CONFIG_SOC_SERIES_STM32F4X)
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struct stm32f4x_pclken pclken;
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@ -10,6 +10,8 @@ endif
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ifdef CONFIG_SOC_SERIES_STM32F3X
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obj-y += stm32f3xx/drivers/src/stm32f3xx_hal.o
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obj-y += stm32f3xx/drivers/src/stm32f3xx_hal_rcc.o
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obj-$(CONFIG_SERIAL_HAS_DRIVER) += stm32f3xx/drivers/src/stm32f3xx_hal_uart.o
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obj-y += stm32f3xx/soc/system_stm32f3xx.o
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endif
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