uart/stm32: add STM32F3X support for uart

Change-Id: I9796c6a2841c972eeab15894a6d7f38ae93606d1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-01-11 07:38:52 -06:00
commit 05f717e71b
5 changed files with 27 additions and 2 deletions

View file

@ -55,6 +55,9 @@ static int stm32f3_init(struct device *arg)
irq_unlock(key);
/* Update CMSIS SystemCoreClock variable (HCLK) */
SystemCoreClock = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
return 0;
}

View file

@ -58,6 +58,10 @@ enum stm32f3x_pin_config_mode {
#include "soc_irq.h"
#ifdef CONFIG_SERIAL_HAS_DRIVER
#include <stm32f3xx_ll_usart.h>
#endif
#endif /* !_ASMLANGUAGE */
#endif /* _STM32F3_SOC_H_ */

View file

@ -286,7 +286,9 @@ static int uart_stm32_init(struct device *dev)
__uart_stm32_get_clock(dev);
/* enable clock */
#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)
clock_control_on(data->clock, config->clock_subsys);
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
clock_control_on(data->clock,
@ -325,6 +327,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
},
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F3X
.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
.enr = STM32F4X_CLOCK_ENABLE_USART1 },
@ -350,6 +354,8 @@ static void uart_stm32_irq_config_func_1(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_1_IRQ STM32F1_IRQ_USART1
#elif CONFIG_SOC_SERIES_STM32F3X
#define PORT_1_IRQ STM32F3_IRQ_USART1
#elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_1_IRQ STM32F4_IRQ_USART1
#elif CONFIG_SOC_SERIES_STM32L4X
@ -381,6 +387,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
},
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
#elif CONFIG_SOC_SERIES_STM32F3X
.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART2),
#elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
.enr = STM32F4X_CLOCK_ENABLE_USART2 },
@ -406,6 +414,8 @@ static void uart_stm32_irq_config_func_2(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_2_IRQ STM32F1_IRQ_USART2
#elif CONFIG_SOC_SERIES_STM32F3X
#define PORT_2_IRQ STM32F3_IRQ_USART2
#elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_2_IRQ STM32F4_IRQ_USART2
#elif CONFIG_SOC_SERIES_STM32L4X
@ -437,6 +447,8 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
},
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32F3X
.clock_subsys = UINT_TO_POINTER(STM32F3X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32F4X
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32L4X
@ -461,6 +473,8 @@ static void uart_stm32_irq_config_func_3(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_3_IRQ STM32F1_IRQ_USART3
#elif CONFIG_SOC_SERIES_STM32F3X
#define PORT_3_IRQ STM32F3_IRQ_USART3
#elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_3_IRQ STM32F4_IRQ_USART3
#elif CONFIG_SOC_SERIES_STM32L4X

View file

@ -16,7 +16,9 @@
struct uart_stm32_config {
struct uart_device_config uconf;
/* clock subsystem driving this peripheral */
#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L4X)
#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)
clock_control_subsys_t clock_subsys;
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
struct stm32f4x_pclken pclken;

View file

@ -10,6 +10,8 @@ endif
ifdef CONFIG_SOC_SERIES_STM32F3X
obj-y += stm32f3xx/drivers/src/stm32f3xx_hal.o
obj-y += stm32f3xx/drivers/src/stm32f3xx_hal_rcc.o
obj-$(CONFIG_SERIAL_HAS_DRIVER) += stm32f3xx/drivers/src/stm32f3xx_hal_uart.o
obj-y += stm32f3xx/soc/system_stm32f3xx.o
endif