boards: arm: provide support for nucleo f030r8.

Fixes #3923

Signed-off-by: Maciej Debski <maciej.debski@rndity.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

boards/arm/nucleo_f030r8/Kconfig.board

@@ -0,0 +1,10 @@
+# Kconfig - STM32 Nucleo-64 development board with STM32F030R8 MCU configuration
+#
+# Copyright (c) 2017 RnDity Sp. z o.o.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_NUCLEO_F030R8
+	bool "NUCLEO-64 F030R8 Development Board"
+	depends on SOC_STM32F030X8

boards/arm/nucleo_f030r8/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Kconfig - STM32 Nucleo-64 development board with STM32F030R8 MCU
+#
+# Copyright (c) 2017 RnDity Sp. z o.o.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_NUCLEO_F030R8
+
+config BOARD
+	default nucleo_f030r8
+
+endif # BOARD_NUCLEO_F030R8

boards/arm/nucleo_f030r8/Makefile

@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2017 RnDity Sp. z o.o.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+ccflags-y +=-I$(srctree)/drivers
+
+obj-y += pinmux.o

boards/arm/nucleo_f030r8/Makefile.board

@@ -0,0 +1,7 @@
+FLASH_SCRIPT = openocd.sh
+DEBUG_SCRIPT = openocd.sh
+
+OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+
+export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD

boards/arm/nucleo_f030r8/board.h

@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2017 RnDity Sp. z o.o.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT	"GPIOC"
+#define USER_PB_GPIO_PIN	13
+
+/* LD2 green LED */
+#define LD2_GPIO_PORT		"GPIOA"
+#define LD2_GPIO_PIN		5
+
+/* Create aliases to make the basic samples work */
+#define SW0_GPIO_NAME		USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN		USER_PB_GPIO_PIN
+#define LED0_GPIO_PORT		LD2_GPIO_PORT
+#define LED0_GPIO_PIN		LD2_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/nucleo_f030r8/doc/nucleof334r8.rst

@@ -0,0 +1,168 @@
+.. _nucleo_f030r8_board:
+
+ST Nucleo F030R8
+################
+
+Overview
+********
+The STM32 Nucleo-64 development board with STM32F030R8 MCU, supports Arduino and ST morpho connectivity.
+
+The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
+and build prototypes with the STM32 microcontroller, choosing from the various
+combinations of performance, power consumption and features.
+
+The Arduino* Uno V3 connectivity support and the ST morpho headers allow easy functionality
+expansion of the STM32 Nucleo open development platform with a wide choice of
+specialized shields.
+
+The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
+
+The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
+with various packaged software examples.
+
+.. image:: img/nucleo_f030r8_board.jpg
+     :width: 500px
+     :height: 367px
+     :align: center
+     :alt: Nucleo F030R8
+
+More information about the board can be found at the `Nucleo F030R8 website`_.
+
+Hardware
+********
+Nucleo F030R8 provides the following hardware components:
+
+- STM32 microcontroller in QFP64 package
+- Two types of extension resources:
+    - Arduino* Uno V3 connectivity
+    - ST morpho extension pin headers for full access to all STM32 I/Os
+- ARM* mbed*
+- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
+    - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
+- Flexible board power supply:
+    - USB VBUS or external source (3.3V, 5V, 7 - 12V)
+    - Power management access point
+- Three LEDs:
+    - USB communication (LD1), user LED (LD2), power LED (LD3)
+- Two push-buttons: USER and RESET
+- USB re-enumeration capability. Three different interfaces supported on USB:
+    - Virtual COM port
+    - Mass storage
+    - Debug port
+- Support of wide choice of Integrated Development Environments (IDEs) including:
+    - IAR
+    - ARM Keil
+    - GCC-based IDEs
+
+More information about STM32F030R8 can be found here:
+       - `STM32F030 reference manual`_
+
+
+Supported Features
+==================
+
+The Zephyr nucleo_f030r8 board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| CLOCK     | on-chip    | reset and clock control             |
++-----------+------------+-------------------------------------+
+| FLASH     | on-chip    | flash memory                        |
++-----------+------------+-------------------------------------+
+| IWDG      | on-chip    | independent watchdog                |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not yet supported in this Zephyr port.
+
+The default configuration can be found in the defconfig file:
+``boards/arm/nucleo_f030r8/nucleo_f030r8_defconfig``
+
+Connections and IOs
+===================
+
+Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
+input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
+GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
+capable except for analog inputs.
+
+Board connectors:
+-----------------
+.. image:: img/nucleo_f030r8_connectors.png
+     :width: 800px
+     :align: center
+     :height: 619px
+     :alt: Nucleo F030R8 connectors
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+- UART_1_TX : PA9
+- UART_1_RX : PA10
+- UART_2_TX : PA2
+- UART_2_RX : PA3
+
+For mode details please refer to `STM32 Nucleo-64 board User Manual`_.
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+Nucleo F030R8 board includes an ST-LINK/V2-1 embedded debug tool interface.
+This interface is supported by the openocd version included in the Zephyr SDK.
+
+Flashing an application to Nucleo F030R8
+----------------------------------------
+
+The sample application :ref:`blinky-sample` is being used in this tutorial.
+
+.. code-block:: console
+
+   $ cd <zephyr_root_path>
+   $ source zephyr-env.sh
+   $ cd $ZEPHYR_BASE/samples/basic/blinky
+   $ make BOARD=nucleo_f030r8
+
+Connect the Nucleo F030R8 to your host computer using the USB port.
+Then, enter the following command:
+
+.. code-block:: console
+
+   $ make BOARD=nucleo_f030r8 flash
+
+You will see the LED blinking every second.
+
+Debugging
+=========
+
+Access gdb with the following make command:
+
+.. code-block:: console
+
+   $ make BOARD=nucleo_f030r8 debug
+
+
+References
+**********
+
+.. target-notes::
+
+.. _Nucleo F030R8 website:
+   http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f0-series/stm32f0x0-value-line/stm32f030r8.html
+
+.. _STM32F030 reference manual:
+   www.st.com/resource/en/reference_manual/dm00091010.pdf
+
+.. _STM32 Nucleo-64 board User Manual:
+   http://www.st.com/resource/en/user_manual/dm00105823.pdf
+

boards/arm/nucleo_f030r8/nucleo_f030r8.yaml

@@ -0,0 +1,8 @@
+identifier: nucleo_f030r8
+name: NUCLEO-F030R8
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb
+ram: 8

boards/arm/nucleo_f030r8/nucleo_f030r8_defconfig

@@ -0,0 +1,53 @@
+# Zephyr Kernel Configuration
+CONFIG_ARM=y
+CONFIG_ARCH="arm"
+CONFIG_SOC="stm32f030x8"
+CONFIG_SOC_SERIES="stm32f0"
+CONFIG_SOC_FAMILY="st_stm32"
+CONFIG_BOARD="nucleo_f030r8"
+CONFIG_SOC_SERIES_STM32F0X=y
+
+# Platform Configuration
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_STM32F030X8=y
+CONFIG_BOARD_NUCLEO_F030R8=y
+
+# General Kernel Options
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_SERIAL_HAS_DRIVER=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_UART_STM32=y
+# enable USART2 - passthrough to STLINK v2 connector
+CONFIG_UART_STM32_PORT_2=y
+# enable console on this port by default
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# GPIO Controller
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+# SYSCLK selection
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# HSE configuration
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+# PLL configuration
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# produce 48MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_PREDIV=1
+CONFIG_CLOCK_STM32_PLL_MULTIPLIER=6
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=1

boards/arm/nucleo_f030r8/pinmux.c

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2017 RnDity Sp. z o.o.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+#include "pinmux/pinmux.h"
+
+#include "pinmux/stm32/pinmux_stm32.h"
+
+/* pin assignments for NUCLEO-F030R8 board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
+#endif	/* CONFIG_UART_STM32_PORT_1 */
+#ifdef CONFIG_UART_STM32_PORT_2
+	{STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX},
+#endif	/* CONFIG_UART_STM32_PORT_2 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+	 CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

boards/arm/nucleo_f030r8/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/st_nucleo_f0.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+        echo "Debugger attaching: halting execution"
+        reset halt
+        gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+        echo "Debugger detaching: resuming execution"
+        resume
+}

dts/arm/nucleo_f030r8.dts

@@ -20,7 +20,7 @@
 
 &usart1 {
 	current-speed = <115200>;
-	pinctrl-0 = <&usart1_pins_a>;
+	pinctrl-0 = <&usart1_pins_b>;
 	pinctrl-names = "default";
 	status = "ok";
 };