soc: st: stm32: add stm32n6 series

Add STM32N6 series

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>

soc/st/stm32/soc.yml

@@ -186,6 +186,9 @@ family:
   - name: stm32mp1x
     socs:
     - name: stm32mp157cxx
+  - name: stm32n6x
+    socs:
+    - name: stm32n657xx
   - name: stm32u0x
     socs:
     - name: stm32u031xx

soc/st/stm32/stm32n6x/CMakeLists.txt

@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(${ZEPHYR_BASE}/drivers)
+zephyr_sources(
+  soc.c
+  )
+
+zephyr_include_directories(.)
+
+set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

soc/st/stm32/stm32n6x/Kconfig

@@ -0,0 +1,18 @@
+# ST Microelectronics STM32N6 MCU series
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STM32N6X
+	select ARM
+	select CPU_CORTEX_M55
+	select ARM_TRUSTZONE_M
+	select CPU_HAS_ARM_SAU
+	select CPU_HAS_ARM_MPU
+	select CPU_HAS_FPU
+	select ARMV8_M_DSP
+	select CPU_CORTEX_M_HAS_DWT
+	select HAS_STM32CUBE
+	select INIT_ARCH_HW_AT_BOOT
+	select SOC_RESET_HOOK
+	select TRUSTED_EXECUTION_SECURE

soc/st/stm32/stm32n6x/Kconfig.defconfig

@@ -0,0 +1,17 @@
+# ST Microelectronics STM32N6 MCU series
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_STM32N6X
+
+rsource "Kconfig.defconfig.stm32n6*"
+
+DT_STM32_CPU_CLOCK_PATH := $(dt_nodelabel_path,cpusw)
+DT_STM32_CPU_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_CPU_CLOCK_PATH),clock-frequency)
+
+# For STM32N6, override the value defined in STM32 Kconfig to use CPU clock frequency
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default "$(DT_STM32_CPU_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,cpusw)"
+
+endif # SOC_SERIES_STM32N6X

soc/st/stm32/stm32n6x/Kconfig.defconfig.stm32n657xx

@@ -0,0 +1,11 @@
+# ST Microelectronics STM32N6 MCU series
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_STM32N657XX
+
+config NUM_IRQS
+	default 194
+
+endif # SOC_STM32N657XX

soc/st/stm32/stm32n6x/Kconfig.soc

@@ -0,0 +1,18 @@
+# ST Microelectronics STM32N6 MCU series
+
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_STM32N6X
+	bool
+	select SOC_FAMILY_STM32
+
+config SOC_SERIES
+	default "stm32n6x" if SOC_SERIES_STM32N6X
+
+config SOC_STM32N657XX
+	bool
+	select SOC_SERIES_STM32N6X
+
+config SOC
+	default "stm32n657xx" if SOC_STM32N657XX

soc/st/stm32/stm32n6x/soc.c

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief System/hardware module for STM32N6 processor
+ */
+
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/cache.h>
+#include <zephyr/logging/log.h>
+
+#include <stm32_ll_bus.h>
+#include <stm32_ll_pwr.h>
+#include <stm32_ll_icache.h>
+
+#include <cmsis_core.h>
+
+#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
+LOG_MODULE_REGISTER(soc);
+
+extern char _vector_start[];
+void *g_pfnVectors = (void *)_vector_start;
+
+#if defined(CONFIG_SOC_RESET_HOOK)
+void soc_reset_hook(void)
+{
+	/* This is provided by STM32Cube HAL */
+	SystemInit();
+}
+#endif
+
+/**
+ * @brief Perform basic hardware initialization at boot.
+ *
+ * This needs to be run from the very beginning.
+ *
+ * @return 0
+ */
+void soc_early_init_hook(void)
+{
+	/* Enable caches */
+	sys_cache_instr_enable();
+	sys_cache_data_enable();
+
+	/* Update CMSIS SystemCoreClock variable (HCLK) */
+	/* At reset, system core clock is set to 64 MHz from HSI */
+	SystemCoreClock = 64000000;
+
+	/* Enable PWR */
+	LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_PWR);
+
+	/* Enable IOs */
+	LL_PWR_EnableVddIO2();
+	LL_PWR_EnableVddIO3();
+	LL_PWR_EnableVddIO4();
+	LL_PWR_EnableVddIO5();
+}

soc/st/stm32/stm32n6x/soc.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file SoC configuration macros for the STM32N6 family processors.
+ *
+ */
+
+
+#ifndef _STM32N6_SOC_H_
+#define _STM32N6_SOC_H_
+
+#ifndef _ASMLANGUAGE
+
+#include <stm32n6xx.h>
+
+#endif /* !_ASMLANGUAGE */
+
+#endif /* _STM32N6_SOC_H_ */