From 016d048ded76bc22e946416f8ed51e8a76fdc710 Mon Sep 17 00:00:00 2001 From: Guillaume Gautier Date: Fri, 22 Mar 2024 11:15:40 +0100 Subject: [PATCH] soc: st: stm32: add stm32n6 series Add STM32N6 series Signed-off-by: Guillaume Gautier --- soc/st/stm32/soc.yml | 3 + soc/st/stm32/stm32n6x/CMakeLists.txt | 10 +++ soc/st/stm32/stm32n6x/Kconfig | 18 ++++++ soc/st/stm32/stm32n6x/Kconfig.defconfig | 17 +++++ .../stm32n6x/Kconfig.defconfig.stm32n657xx | 11 ++++ soc/st/stm32/stm32n6x/Kconfig.soc | 18 ++++++ soc/st/stm32/stm32n6x/soc.c | 62 +++++++++++++++++++ soc/st/stm32/stm32n6x/soc.h | 22 +++++++ 8 files changed, 161 insertions(+) create mode 100644 soc/st/stm32/stm32n6x/CMakeLists.txt create mode 100644 soc/st/stm32/stm32n6x/Kconfig create mode 100644 soc/st/stm32/stm32n6x/Kconfig.defconfig create mode 100644 soc/st/stm32/stm32n6x/Kconfig.defconfig.stm32n657xx create mode 100644 soc/st/stm32/stm32n6x/Kconfig.soc create mode 100644 soc/st/stm32/stm32n6x/soc.c create mode 100644 soc/st/stm32/stm32n6x/soc.h diff --git a/soc/st/stm32/soc.yml b/soc/st/stm32/soc.yml index ba24bcf143e..4e5d6595733 100644 --- a/soc/st/stm32/soc.yml +++ b/soc/st/stm32/soc.yml @@ -186,6 +186,9 @@ family: - name: stm32mp1x socs: - name: stm32mp157cxx + - name: stm32n6x + socs: + - name: stm32n657xx - name: stm32u0x socs: - name: stm32u031xx diff --git a/soc/st/stm32/stm32n6x/CMakeLists.txt b/soc/st/stm32/stm32n6x/CMakeLists.txt new file mode 100644 index 00000000000..eebd281cd96 --- /dev/null +++ b/soc/st/stm32/stm32n6x/CMakeLists.txt @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(${ZEPHYR_BASE}/drivers) +zephyr_sources( + soc.c + ) + +zephyr_include_directories(.) + +set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "") diff --git a/soc/st/stm32/stm32n6x/Kconfig b/soc/st/stm32/stm32n6x/Kconfig new file mode 100644 index 00000000000..853261ac183 --- /dev/null +++ b/soc/st/stm32/stm32n6x/Kconfig @@ -0,0 +1,18 @@ +# ST Microelectronics STM32N6 MCU series + +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_STM32N6X + select ARM + select CPU_CORTEX_M55 + select ARM_TRUSTZONE_M + select CPU_HAS_ARM_SAU + select CPU_HAS_ARM_MPU + select CPU_HAS_FPU + select ARMV8_M_DSP + select CPU_CORTEX_M_HAS_DWT + select HAS_STM32CUBE + select INIT_ARCH_HW_AT_BOOT + select SOC_RESET_HOOK + select TRUSTED_EXECUTION_SECURE diff --git a/soc/st/stm32/stm32n6x/Kconfig.defconfig b/soc/st/stm32/stm32n6x/Kconfig.defconfig new file mode 100644 index 00000000000..2e9856e8b02 --- /dev/null +++ b/soc/st/stm32/stm32n6x/Kconfig.defconfig @@ -0,0 +1,17 @@ +# ST Microelectronics STM32N6 MCU series + +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_STM32N6X + +rsource "Kconfig.defconfig.stm32n6*" + +DT_STM32_CPU_CLOCK_PATH := $(dt_nodelabel_path,cpusw) +DT_STM32_CPU_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_CPU_CLOCK_PATH),clock-frequency) + +# For STM32N6, override the value defined in STM32 Kconfig to use CPU clock frequency +config SYS_CLOCK_HW_CYCLES_PER_SEC + default "$(DT_STM32_CPU_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,cpusw)" + +endif # SOC_SERIES_STM32N6X diff --git a/soc/st/stm32/stm32n6x/Kconfig.defconfig.stm32n657xx b/soc/st/stm32/stm32n6x/Kconfig.defconfig.stm32n657xx new file mode 100644 index 00000000000..910e6426690 --- /dev/null +++ b/soc/st/stm32/stm32n6x/Kconfig.defconfig.stm32n657xx @@ -0,0 +1,11 @@ +# ST Microelectronics STM32N6 MCU series + +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +if SOC_STM32N657XX + +config NUM_IRQS + default 194 + +endif # SOC_STM32N657XX diff --git a/soc/st/stm32/stm32n6x/Kconfig.soc b/soc/st/stm32/stm32n6x/Kconfig.soc new file mode 100644 index 00000000000..71879c0848a --- /dev/null +++ b/soc/st/stm32/stm32n6x/Kconfig.soc @@ -0,0 +1,18 @@ +# ST Microelectronics STM32N6 MCU series + +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_STM32N6X + bool + select SOC_FAMILY_STM32 + +config SOC_SERIES + default "stm32n6x" if SOC_SERIES_STM32N6X + +config SOC_STM32N657XX + bool + select SOC_SERIES_STM32N6X + +config SOC + default "stm32n657xx" if SOC_STM32N657XX diff --git a/soc/st/stm32/stm32n6x/soc.c b/soc/st/stm32/stm32n6x/soc.c new file mode 100644 index 00000000000..c967404862c --- /dev/null +++ b/soc/st/stm32/stm32n6x/soc.c @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief System/hardware module for STM32N6 processor + */ + +#include +#include +#include +#include + +#include +#include +#include + +#include + +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +LOG_MODULE_REGISTER(soc); + +extern char _vector_start[]; +void *g_pfnVectors = (void *)_vector_start; + +#if defined(CONFIG_SOC_RESET_HOOK) +void soc_reset_hook(void) +{ + /* This is provided by STM32Cube HAL */ + SystemInit(); +} +#endif + +/** + * @brief Perform basic hardware initialization at boot. + * + * This needs to be run from the very beginning. + * + * @return 0 + */ +void soc_early_init_hook(void) +{ + /* Enable caches */ + sys_cache_instr_enable(); + sys_cache_data_enable(); + + /* Update CMSIS SystemCoreClock variable (HCLK) */ + /* At reset, system core clock is set to 64 MHz from HSI */ + SystemCoreClock = 64000000; + + /* Enable PWR */ + LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_PWR); + + /* Enable IOs */ + LL_PWR_EnableVddIO2(); + LL_PWR_EnableVddIO3(); + LL_PWR_EnableVddIO4(); + LL_PWR_EnableVddIO5(); +} diff --git a/soc/st/stm32/stm32n6x/soc.h b/soc/st/stm32/stm32n6x/soc.h new file mode 100644 index 00000000000..9274a7db70b --- /dev/null +++ b/soc/st/stm32/stm32n6x/soc.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file SoC configuration macros for the STM32N6 family processors. + * + */ + + +#ifndef _STM32N6_SOC_H_ +#define _STM32N6_SOC_H_ + +#ifndef _ASMLANGUAGE + +#include + +#endif /* !_ASMLANGUAGE */ + +#endif /* _STM32N6_SOC_H_ */