2019-11-01 13:45:29 +01:00
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# STM32 IWDG configuration
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2016-03-16 12:54:03 +01:00
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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2017-06-21 10:36:18 +02:00
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# Copyright (c) 2017 RnDity Sp. z o.o.
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2019-07-15 16:07:00 +03:00
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# Copyright (c) 2019 Centaur Analytics, Inc
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2017-01-18 17:01:01 -08:00
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# SPDX-License-Identifier: Apache-2.0
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2016-03-16 12:54:03 +01:00
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2021-01-27 11:27:58 +01:00
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config IWDG_STM32
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2016-03-16 12:54:03 +01:00
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bool "Independent Watchdog (IWDG) Driver for STM32 family of MCUs"
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default y
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depends on DT_HAS_ST_STM32_WATCHDOG_ENABLED
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2016-03-16 12:54:03 +01:00
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help
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2016-11-29 11:13:49 +00:00
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Enable IWDG driver for STM32 line of MCUs
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2016-03-16 12:54:03 +01:00
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2020-11-27 11:03:10 +01:00
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config IWDG_STM32_INITIAL_TIMEOUT
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int "Value for IWDG timeout in ms"
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2017-06-21 10:36:18 +02:00
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depends on IWDG_STM32
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default 100
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2020-11-27 11:03:10 +01:00
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range 1 26214
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help
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Set initial timeout value for IWDG in ms if enabled at boot.
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The min timeout supported is 1 ms. The max timeout depends on the
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MCU's LSI clock frequency and can be calculated with:
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max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
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Limiting maximum timeout to a safe value of 26214 ms here, which was
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calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
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2019-07-15 16:07:00 +03:00
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config WWDG_STM32
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bool "System Window Watchdog (WWDG) Driver for STM32 family of MCUs"
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default y
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depends on DT_HAS_ST_STM32_WINDOW_WATCHDOG_ENABLED
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2019-07-15 16:07:00 +03:00
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help
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Enable WWDG driver for STM32 line of MCUs
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