zephyr/soc/arm/silabs_exx32/efr32fg1p/dts_fixup.h

/* This file is a temporary workaround for mapping of the generated information
 * to the current driver definitions.  This will be removed when the drivers
 * are modified to handle the generated information, or the mapping of
 * generated data matches the driver definitions.
 */

/* SoC level DTS fixup file */

#define CONFIG_NUM_IRQ_PRIO_BITS	DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

#define FLASH_DEV_BASE_ADDRESS		DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
#define FLASH_DEV_NAME			DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL

#define CONFIG_USART_GECKO_0_BASE_ADDRESS	DT_SILABS_GECKO_USART_40010000_BASE_ADDRESS
#define CONFIG_USART_GECKO_0_CURRENT_SPEED	DT_SILABS_GECKO_USART_40010000_CURRENT_SPEED
#define CONFIG_USART_GECKO_0_IRQ_RX		DT_SILABS_GECKO_USART_40010000_IRQ_0
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY	DT_SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_0_IRQ_TX		DT_SILABS_GECKO_USART_40010000_IRQ_1
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY	DT_SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_0_LABEL		DT_SILABS_GECKO_USART_40010000_LABEL
#define CONFIG_USART_GECKO_0_LOCATION		DT_SILABS_GECKO_USART_40010000_LOCATION
#define CONFIG_USART_GECKO_0_SIZE		DT_SILABS_GECKO_USART_40010000_SIZE

#define CONFIG_USART_GECKO_1_BASE_ADDRESS	DT_SILABS_GECKO_USART_40010400_BASE_ADDRESS
#define CONFIG_USART_GECKO_1_CURRENT_SPEED	DT_SILABS_GECKO_USART_40010400_CURRENT_SPEED
#define CONFIG_USART_GECKO_1_IRQ_RX		DT_SILABS_GECKO_USART_40010400_IRQ_0
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY	DT_SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_1_IRQ_TX		DT_SILABS_GECKO_USART_40010400_IRQ_1
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY	DT_SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_1_LABEL		DT_SILABS_GECKO_USART_40010400_LABEL
#define CONFIG_USART_GECKO_1_LOCATION		DT_SILABS_GECKO_USART_40010400_LOCATION
#define CONFIG_USART_GECKO_1_SIZE		DT_SILABS_GECKO_USART_40010400_SIZE

#define CONFIG_GPIO_GECKO_COMMON_NAME	DT_SILABS_EFR32XG1_GPIO_4000A400_LABEL
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ	DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI	DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ	DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI	DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY

#define CONFIG_GPIO_GECKO_PORTA_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A000_LABEL
#define CONFIG_GPIO_GECKO_PORTB_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A030_LABEL
#define CONFIG_GPIO_GECKO_PORTC_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A060_LABEL
#define CONFIG_GPIO_GECKO_PORTD_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A090_LABEL
#define CONFIG_GPIO_GECKO_PORTE_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A0C0_LABEL
#define CONFIG_GPIO_GECKO_PORTF_NAME	DT_SILABS_EFR32XG1_GPIO_PORT_4000A0F0_LABEL

/* End of SoC Level DTS fixup file */