2015-09-10 10:54:09 -07:00
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/*
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2015-11-30 15:29:39 -05:00
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* Copyright (c) 2014-2015 Wind River Systems, Inc.
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2015-09-10 10:54:09 -07:00
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*
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2015-10-06 11:00:37 -05:00
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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2015-09-10 10:54:09 -07:00
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*
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2015-10-06 11:00:37 -05:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2015-09-10 10:54:09 -07:00
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*
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2015-10-06 11:00:37 -05:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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2015-09-10 10:54:09 -07:00
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*/
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2015-11-30 15:29:39 -05:00
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/**
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* @brief Common parts of the linker scripts for the ARCv2/EM targets.
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*/
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2015-09-10 10:54:09 -07:00
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#define _LINKER
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#define _ASMLANGUAGE
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#include <autoconf.h>
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#include <sections.h>
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#if defined(CONFIG_NSIM)
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EXTERN(_VectorTable)
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#endif
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2015-10-14 11:17:20 -04:00
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#include <linker-defs.h>
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2015-09-10 10:54:09 -07:00
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#include <linker-tool.h>
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/* physical address of RAM */
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2016-08-09 11:45:23 -07:00
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#ifdef CONFIG_HARVARD
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#define ROMABLE_REGION ICCM
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#define RAMABLE_REGION DCCM
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2015-09-10 10:54:09 -07:00
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#else
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2016-08-09 11:45:23 -07:00
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#if defined(CONFIG_XIP) && (FLASH_SIZE != 0)
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#define ROMABLE_REGION FLASH
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#define RAMABLE_REGION SRAM
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#else
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#define ROMABLE_REGION SRAM
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#define RAMABLE_REGION SRAM
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#endif
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2015-09-10 10:54:09 -07:00
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#endif
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#if defined(CONFIG_XIP)
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#define _DATA_IN_ROM __data_rom_start
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#else
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#define _DATA_IN_ROM
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#endif
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2016-08-09 11:45:23 -07:00
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OUTPUT_ARCH(arc)
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ENTRY(__start)
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2015-09-10 10:54:09 -07:00
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MEMORY {
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2016-08-09 11:45:23 -07:00
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#ifdef FLASH_START
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FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE*1k
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#endif
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#ifdef ICCM_START
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ICCM (rx) : ORIGIN = ICCM_START, LENGTH = ICCM_SIZE*1k
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#endif
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#ifdef SRAM_START
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SRAM (rwx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE*1k
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#endif
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#ifdef DCCM_START
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DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE*1k
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#endif
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2015-09-10 10:54:09 -07:00
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}
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SECTIONS {
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GROUP_START(ROMABLE_REGION)
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SECTION_PROLOGUE(_TEXT_SECTION_NAME,,ALIGN(1024)) {
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2015-10-30 12:50:11 -04:00
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_image_rom_start = .;
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2015-10-30 12:36:06 -04:00
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_image_text_start = .;
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2015-09-10 10:54:09 -07:00
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/* when !XIP, .text is in RAM, and vector table must be at its very start */
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KEEP(*(.exc_vector_table))
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KEEP(*(".exc_vector_table.*"))
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KEEP(*(.irq_vector_table))
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KEEP(*(".irq_vector_table.*"))
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2016-01-20 15:13:38 -08:00
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KEEP(*(.isr_irq*))
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2016-05-17 09:48:18 -04:00
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/*
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* The following sections maps the location of the different
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* rows for the _sw_isr_table. Each row maps to an IRQ entry
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* (handler, argument).
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*
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* In ARC architecture, IRQ 0-15 are reserved for the system
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* and are not * assignable by the user, for that reason the
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* linker sections start on IRQ 16
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*/
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2016-01-20 15:13:38 -08:00
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/* sections for IRQ16-19 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[1][6-9])))
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/* sections for IRQ20-99 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[2-9][0-9])))
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/* sections for IRQ100-999 */
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KEEP(*(SORT(.gnu.linkonce.isr_irq[1-9][0-9][0-9])))
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*(.text)
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*(".text.*")
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2016-01-13 13:02:56 -05:00
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*(.gnu.linkonce.t.*)
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2015-09-10 10:54:09 -07:00
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2015-10-30 12:36:06 -04:00
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_image_text_end = .;
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2015-09-10 10:54:09 -07:00
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} GROUP_LINK_IN(ROMABLE_REGION)
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SECTION_PROLOGUE (devconfig, (OPTIONAL),)
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{
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__devconfig_start = .;
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*(".devconfig.*")
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KEEP(*(SORT_BY_NAME(".devconfig*")))
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__devconfig_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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2016-01-13 13:02:56 -05:00
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#ifdef CONFIG_CPLUSPLUS
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SECTION_PROLOGUE(_CTOR_SECTION_NAME,,) {
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/*
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* The compiler fills the constructor pointers table below, hence
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* symbol __CTOR_LIST__ must be aligned on 4 byte boundary.
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* To align with the C++ standard, the first element of the array
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* contains the number of actual constructors. The last element is
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* NULL.
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*/
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. = ALIGN(4);
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__CTOR_LIST__ = .;
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LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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KEEP(*(SORT_BY_NAME(".ctors*")))
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LONG(0)
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__CTOR_END__ = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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2016-01-13 13:02:56 -05:00
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SECTION_PROLOGUE(init_array, (OPTIONAL),)
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{
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. = ALIGN(4);
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__init_array_start = .;
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KEEP(*(SORT_BY_NAME(".init_array*")))
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__init_array_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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2015-09-10 10:54:09 -07:00
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) {
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*(.rodata)
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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2015-09-10 10:54:09 -07:00
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} GROUP_LINK_IN(ROMABLE_REGION)
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2015-10-30 12:50:11 -04:00
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_image_rom_end = .;
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2015-09-10 10:54:09 -07:00
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__data_rom_start = ALIGN(4); /* XIP imaged DATA ROM start addr */
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GROUP_END(ROMABLE_REGION)
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GROUP_START(RAMABLE_REGION)
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#if defined(CONFIG_XIP)
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SECTION_AT_PROLOGUE(_DATA_SECTION_NAME,,,_DATA_IN_ROM) {
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#else
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SECTION_PROLOGUE(_DATA_SECTION_NAME,,) {
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#endif
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/* when XIP, .text is in ROM, but vector table must be at start of .data */
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2015-10-30 12:50:11 -04:00
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_image_ram_start = .;
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2015-09-10 10:54:09 -07:00
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__data_ram_start = .;
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*(.data)
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*(".data.*")
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2016-01-20 15:13:38 -08:00
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2015-09-10 10:54:09 -07:00
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(initlevel, (OPTIONAL),)
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{
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2015-10-14 11:17:20 -04:00
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DEVICE_INIT_SECTIONS()
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2015-09-10 10:54:09 -07:00
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} GROUP_LINK_IN(RAMABLE_REGION)
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2016-05-20 21:35:34 -07:00
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SECTION_PROLOGUE (_k_task_list, (OPTIONAL),)
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{
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_k_task_list_start = .;
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*(._k_task_list.public.*)
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*(._k_task_list.private.*)
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_k_task_list_idle_start = .;
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*(._k_task_list.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_list*")))
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_k_task_list_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE (_k_task_ptr, (OPTIONAL),)
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{
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_k_task_ptr_start = .;
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*(._k_task_ptr.public.*)
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*(._k_task_ptr.private.*)
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*(._k_task_ptr.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_ptr*")))
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_k_task_ptr_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE (_k_pipe_ptr, (OPTIONAL),)
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{
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_k_pipe_ptr_start = .;
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*(._k_pipe_ptr.public.*)
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*(._k_pipe_ptr.private.*)
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KEEP(*(SORT_BY_NAME("._k_pipe_ptr*")))
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_k_pipe_ptr_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE (_k_mem_map_ptr, (OPTIONAL),)
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{
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_k_mem_map_ptr_start = .;
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*(._k_mem_map_ptr.public.*)
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*(._k_mem_map_ptr.private.*)
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KEEP(*(SORT_BY_NAME("._k_mem_map_ptr*")))
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_k_mem_map_ptr_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(_k_event_list, (OPTIONAL),)
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{
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_k_event_list_start = .;
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*(._k_event_list.event.*)
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KEEP(*(SORT_BY_NAME("._k_event_list*")))
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_k_event_list_end = .;
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} GROUP_LINK_IN(RAMABLE_REGION)
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2015-09-10 10:54:09 -07:00
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__data_ram_end = .;
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SECTION_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) {
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/*
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* For performance, BSS section is assumed to be 4 byte aligned and
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* a multiple of 4 bytes
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*/
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. = ALIGN(4);
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__bss_start = .;
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*(.bss)
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*(".bss.*")
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COMMON_SYMBOLS
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/*
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* BSP clears this memory in words only and doesn't clear any
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* potential left over bytes.
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*/
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__bss_end = ALIGN(4);
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(_NOINIT_SECTION_NAME,(NOLOAD),) {
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/*
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* This section is used for non-initialized objects that
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* will not be cleared during the boot process.
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*/
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*(.noinit)
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*(".noinit.*")
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} GROUP_LINK_IN(RAMABLE_REGION)
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/* Define linker symbols */
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2015-10-30 12:50:11 -04:00
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_image_ram_end = .;
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2015-09-10 10:54:09 -07:00
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_end = .; /* end of image */
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GROUP_END(RAMABLE_REGION)
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/* Data Closely Coupled Memory (DCCM) */
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GROUP_START(DCCM)
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GROUP_END(DCCM)
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2015-11-30 15:43:12 -05:00
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SECTION_PROLOGUE(initlevel_error, (OPTIONAL),)
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{
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DEVICE_INIT_UNDEFINED_SECTION()
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}
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ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.")
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2015-09-10 10:54:09 -07:00
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}
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