2018-04-11 11:47:19 +02:00
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/*
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* Copyright (c) 2018, Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* SoC level DTS fixup file */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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2019-04-11 14:28:52 +02:00
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#define DT_CPU_CLOCK_FREQUENCY DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
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2018-04-11 11:47:19 +02:00
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#define DT_FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
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#define DT_FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
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#define DT_GPIO_GECKO_COMMON_NAME DT_SILABS_EFM32_GPIO_4000A400_LABEL
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#define DT_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN
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#define DT_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
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#define DT_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD
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#define DT_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
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2019-01-06 00:30:41 +01:00
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#define DT_GPIO_GECKO_SWO_LOCATION DT_SILABS_EFM32_GPIO_4000A400_LOCATION_SWO
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2018-04-11 11:47:19 +02:00
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#define DT_GPIO_GECKO_PORTA_NAME DT_SILABS_EFM32_GPIO_PORT_4000A000_LABEL
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#define DT_GPIO_GECKO_PORTB_NAME DT_SILABS_EFM32_GPIO_PORT_4000A030_LABEL
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#define DT_GPIO_GECKO_PORTC_NAME DT_SILABS_EFM32_GPIO_PORT_4000A060_LABEL
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#define DT_GPIO_GECKO_PORTD_NAME DT_SILABS_EFM32_GPIO_PORT_4000A090_LABEL
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#define DT_GPIO_GECKO_PORTE_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0C0_LABEL
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#define DT_GPIO_GECKO_PORTF_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0F0_LABEL
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2019-12-06 16:21:51 +01:00
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#define DT_GPIO_GECKO_PORTI_NAME DT_SILABS_EFM32_GPIO_PORT_4000A180_LABEL
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#define DT_GPIO_GECKO_PORTJ_NAME DT_SILABS_EFM32_GPIO_PORT_4000A1C0_LABEL
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#define DT_GPIO_GECKO_PORTK_NAME DT_SILABS_EFM32_GPIO_PORT_4000A1F0_LABEL
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2018-04-11 11:47:19 +02:00
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2019-11-04 16:09:42 +01:00
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#define DT_WDT_0_NAME DT_INST_0_SILABS_GECKO_WDOG_LABEL
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#define DT_WDT_1_NAME DT_INST_1_SILABS_GECKO_WDOG_LABEL
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2018-04-11 11:47:19 +02:00
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/* End of SoC Level DTS fixup file */
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