2015-04-10 16:44:37 -07:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2013-2014 Wind River Systems, Inc.
|
|
|
|
*
|
2017-01-18 17:01:01 -08:00
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
2015-04-10 16:44:37 -07:00
|
|
|
*/
|
|
|
|
|
2015-12-04 10:09:39 -05:00
|
|
|
/**
|
|
|
|
* @file
|
|
|
|
* @brief Common linker sections
|
|
|
|
*
|
2015-10-20 09:42:33 -07:00
|
|
|
* This script defines the memory location of the various sections that make up
|
|
|
|
* a Zephyr Kernel image. This file is used by the linker.
|
|
|
|
*
|
|
|
|
* This script places the various sections of the image according to what
|
|
|
|
* features are enabled by the kernel's configuration options.
|
|
|
|
*
|
|
|
|
* For a build that does not use the execute in place (XIP) feature, the script
|
2016-10-20 08:09:32 -07:00
|
|
|
* generates an image suitable for loading into and executing from RAMABLE_REGION by
|
2015-10-20 09:42:33 -07:00
|
|
|
* placing all the sections adjacent to each other. There is also no separate
|
|
|
|
* load address for the DATA section which means it doesn't have to be copied
|
2016-10-20 08:09:32 -07:00
|
|
|
* into RAMABLE_REGION.
|
2015-10-20 09:42:33 -07:00
|
|
|
*
|
|
|
|
* For builds using XIP, there is a different load memory address (LMA) and
|
|
|
|
* virtual memory address (VMA) for the DATA section. In this case the DATA
|
2016-10-20 08:09:32 -07:00
|
|
|
* section is copied into RAMABLE_REGION at runtime.
|
2015-10-20 09:42:33 -07:00
|
|
|
*
|
2016-10-20 08:09:32 -07:00
|
|
|
* When building an XIP image the data section is placed into ROMABLE_REGION. In this
|
2015-10-20 09:42:33 -07:00
|
|
|
* case, the LMA is set to __data_rom_start so the data section is concatenated
|
|
|
|
* at the end of the RODATA section. At runtime, the DATA section is copied
|
2016-10-20 08:09:32 -07:00
|
|
|
* into the RAMABLE_REGION region so it can be accessed with read and write permission.
|
2015-10-20 09:42:33 -07:00
|
|
|
*
|
|
|
|
* Most symbols defined in the sections below are subject to be referenced in
|
|
|
|
* the Zephyr Kernel image. If a symbol is used but not defined the linker will
|
|
|
|
* emit an undefined symbol error.
|
|
|
|
*
|
2016-12-23 07:32:56 -05:00
|
|
|
* Please do not change the order of the section as the kernel expects this
|
2015-10-20 09:42:33 -07:00
|
|
|
* order when programming the MMU.
|
2015-07-01 17:22:39 -04:00
|
|
|
*/
|
2015-04-10 16:44:37 -07:00
|
|
|
|
|
|
|
#define _LINKER
|
|
|
|
|
2016-08-02 12:05:08 -07:00
|
|
|
#define _ASMLANGUAGE
|
2017-06-17 11:30:47 -04:00
|
|
|
#include <linker/linker-defs.h>
|
2015-04-10 16:44:37 -07:00
|
|
|
#include <offsets.h>
|
|
|
|
#include <misc/util.h>
|
|
|
|
|
2017-06-17 11:30:47 -04:00
|
|
|
#include <linker/linker-tool.h>
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2016-10-20 08:09:32 -07:00
|
|
|
#ifdef CONFIG_XIP
|
|
|
|
#define ROMABLE_REGION ROM
|
|
|
|
#define RAMABLE_REGION RAM
|
|
|
|
#else
|
|
|
|
#define ROMABLE_REGION RAM
|
|
|
|
#define RAMABLE_REGION RAM
|
|
|
|
#endif
|
|
|
|
|
2017-07-11 09:56:00 -07:00
|
|
|
#ifdef CONFIG_X86_MMU
|
|
|
|
#define MMU_PAGE_SIZE KB(4)
|
|
|
|
#define MMU_PAGE_ALIGN . = ALIGN(MMU_PAGE_SIZE);
|
|
|
|
#else
|
|
|
|
#define MMU_PAGE_ALIGN
|
|
|
|
#endif
|
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
/* SECTIONS definitions */
|
|
|
|
SECTIONS
|
|
|
|
{
|
|
|
|
GROUP_START(ROMABLE_REGION)
|
|
|
|
|
2015-09-16 19:14:40 -04:00
|
|
|
_image_rom_start = PHYS_LOAD_ADDR;
|
2015-09-21 17:57:39 -04:00
|
|
|
_image_text_start = PHYS_LOAD_ADDR;
|
2015-09-16 19:14:40 -04:00
|
|
|
|
2015-05-12 10:43:08 -05:00
|
|
|
SECTION_PROLOGUE(_TEXT_SECTION_NAME, (OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
2016-09-10 08:06:15 -04:00
|
|
|
. = CONFIG_TEXT_SECTION_OFFSET;
|
2015-04-10 16:44:37 -07:00
|
|
|
*(.text_start)
|
|
|
|
*(".text_start.*")
|
|
|
|
*(.text)
|
|
|
|
*(".text.*")
|
2016-01-13 13:02:56 -05:00
|
|
|
*(.gnu.linkonce.t.*)
|
2015-04-10 16:44:37 -07:00
|
|
|
*(.eh_frame)
|
|
|
|
*(.init)
|
|
|
|
*(.fini)
|
|
|
|
*(.eini)
|
2017-02-01 10:21:21 -08:00
|
|
|
KEEP(*(.openocd_dbg))
|
|
|
|
KEEP(*(".openocd_dbg.*"))
|
2015-04-10 16:44:37 -07:00
|
|
|
} GROUP_LINK_IN(ROMABLE_REGION)
|
|
|
|
|
2015-09-21 17:57:39 -04:00
|
|
|
_image_text_end = .;
|
2017-07-11 09:07:46 -07:00
|
|
|
_image_rodata_start = .;
|
2015-09-21 17:57:39 -04:00
|
|
|
|
2016-10-20 08:09:32 -07:00
|
|
|
#include <linker/common-rom.ld>
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2015-05-12 10:43:08 -05:00
|
|
|
SECTION_PROLOGUE(_RODATA_SECTION_NAME, (OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
|
|
|
*(.rodata)
|
|
|
|
*(".rodata.*")
|
2016-01-13 13:02:56 -05:00
|
|
|
*(.gnu.linkonce.r.*)
|
2016-10-21 09:29:09 -07:00
|
|
|
|
|
|
|
. = ALIGN(8);
|
|
|
|
_idt_base_address = .;
|
2017-06-01 22:12:30 -07:00
|
|
|
#ifdef LINKER_PASS2
|
2016-10-21 09:29:09 -07:00
|
|
|
KEEP(*(staticIdt))
|
2017-06-01 22:12:30 -07:00
|
|
|
#else
|
|
|
|
. += CONFIG_IDT_NUM_VECTORS * 8;
|
|
|
|
#endif
|
2016-05-06 21:21:56 -07:00
|
|
|
|
2016-08-02 12:05:08 -07:00
|
|
|
#ifndef CONFIG_X86_FIXED_IRQ_MAPPING
|
2016-10-21 09:29:09 -07:00
|
|
|
. = ALIGN(4);
|
|
|
|
_irq_to_interrupt_vector = .;
|
2017-06-01 22:12:30 -07:00
|
|
|
#ifdef LINKER_PASS2
|
2016-10-21 09:29:09 -07:00
|
|
|
KEEP(*(irq_int_vector_map))
|
2017-06-01 22:12:30 -07:00
|
|
|
#else
|
|
|
|
. += CONFIG_MAX_IRQ_LINES;
|
|
|
|
#endif
|
2016-09-14 16:25:55 -04:00
|
|
|
#endif
|
2016-10-21 09:29:09 -07:00
|
|
|
|
2016-11-21 14:16:11 -08:00
|
|
|
#ifdef CONFIG_CUSTOM_RODATA_LD
|
|
|
|
/* Located in project source directory */
|
|
|
|
#include <custom-rodata.ld>
|
|
|
|
#endif
|
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
} GROUP_LINK_IN(ROMABLE_REGION)
|
|
|
|
|
2017-07-11 09:07:46 -07:00
|
|
|
_image_rodata_end = .;
|
2017-07-11 09:56:00 -07:00
|
|
|
__data_rom_start = ALIGN(4); /* XIP imaged DATA ROMABLE_REGION start addr */
|
|
|
|
|
|
|
|
/* This align directive needs to be after __data_rom_start or XIP
|
|
|
|
* won't be copying the data from the right LMA
|
|
|
|
*/
|
|
|
|
MMU_PAGE_ALIGN
|
2015-09-16 19:14:40 -04:00
|
|
|
_image_rom_end = .;
|
2017-07-11 09:07:46 -07:00
|
|
|
_image_rom_size = _image_rom_end - _image_rom_start;
|
2015-04-10 16:44:37 -07:00
|
|
|
|
|
|
|
GROUP_END(ROMABLE_REGION)
|
|
|
|
|
2016-10-20 08:09:32 -07:00
|
|
|
/* RAMABLE_REGION */
|
|
|
|
GROUP_START(RAMABLE_REGION)
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2016-09-22 14:20:56 -07:00
|
|
|
SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME, (OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
2015-09-16 19:14:40 -04:00
|
|
|
_image_ram_start = .;
|
2017-06-14 16:10:20 -07:00
|
|
|
__kernel_ram_start = .;
|
2015-04-10 16:44:37 -07:00
|
|
|
__data_ram_start = .;
|
2017-06-14 16:10:20 -07:00
|
|
|
|
|
|
|
KERNEL_INPUT_SECTION(.data)
|
|
|
|
KERNEL_INPUT_SECTION(".data.*")
|
2017-07-18 16:09:32 -07:00
|
|
|
*(".kernel.*")
|
2016-11-21 14:16:11 -08:00
|
|
|
|
|
|
|
#ifdef CONFIG_CUSTOM_RWDATA_LD
|
|
|
|
/* Located in project source directory */
|
|
|
|
#include <custom-rwdata.ld>
|
|
|
|
#endif
|
|
|
|
|
2017-07-14 15:29:17 -07:00
|
|
|
#ifdef CONFIG_GDT_DYNAMIC
|
2017-07-14 16:35:17 -07:00
|
|
|
KEEP(*(.tss))
|
2017-07-14 15:29:17 -07:00
|
|
|
. = ALIGN(8);
|
|
|
|
_gdt = .;
|
|
|
|
#ifdef LINKER_PASS2
|
|
|
|
KEEP(*(gdt_ram_data))
|
|
|
|
#else /* LINKER_PASS2 */
|
|
|
|
|
2017-07-14 16:35:17 -07:00
|
|
|
#ifdef CONFIG_X86_STACK_PROTECTION
|
|
|
|
#define GDT_NUM_ENTRIES 5
|
|
|
|
#else /* CONFIG_X86_STACK_PROTECTION */
|
2017-07-14 15:29:17 -07:00
|
|
|
#define GDT_NUM_ENTRIES 3
|
2017-07-14 16:35:17 -07:00
|
|
|
#endif /* CONFIG_X86_STACK_PROTECTION */
|
2017-07-14 15:29:17 -07:00
|
|
|
|
|
|
|
. += GDT_NUM_ENTRIES * 8;
|
|
|
|
#endif /* LINKER_PASS2 */
|
|
|
|
#endif /* CONFIG_GDT_DYNAMIC */
|
|
|
|
|
2017-05-22 11:19:52 +05:30
|
|
|
#ifdef CONFIG_X86_MMU
|
2017-07-11 09:56:00 -07:00
|
|
|
/* Page Tables are located here if MMU is enabled.*/
|
|
|
|
MMU_PAGE_ALIGN
|
2017-05-22 11:19:52 +05:30
|
|
|
__mmu_tables_start = .;
|
|
|
|
KEEP(*(.mmu_data));
|
|
|
|
__mmu_tables_end = .;
|
|
|
|
#endif
|
2015-04-10 16:44:37 -07:00
|
|
|
. = ALIGN(4);
|
2016-10-20 08:09:32 -07:00
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
2015-06-01 11:11:39 -07:00
|
|
|
|
2016-10-20 08:09:32 -07:00
|
|
|
#include <linker/common-ram.ld>
|
2016-09-01 18:14:17 -04:00
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
__data_ram_end = .;
|
|
|
|
|
2015-05-12 10:43:08 -05:00
|
|
|
SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* For performance, BSS section is forced to be both 4 byte aligned and
|
|
|
|
* a multiple of 4 bytes.
|
|
|
|
*/
|
|
|
|
|
|
|
|
. = ALIGN(4);
|
|
|
|
|
|
|
|
__bss_start = .;
|
|
|
|
|
2017-06-14 16:10:20 -07:00
|
|
|
KERNEL_INPUT_SECTION(.bss)
|
|
|
|
KERNEL_INPUT_SECTION(".bss.*")
|
|
|
|
KERNEL_INPUT_SECTION(COMMON)
|
2017-07-14 08:55:51 -07:00
|
|
|
*(".kernel_bss.*")
|
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
/*
|
2015-07-27 09:47:56 -04:00
|
|
|
* As memory is cleared in words only, it is simpler to ensure the BSS
|
|
|
|
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
|
2015-04-10 16:44:37 -07:00
|
|
|
*/
|
|
|
|
. = ALIGN(4);
|
|
|
|
__bss_end = .;
|
2017-06-14 16:10:20 -07:00
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
|
|
|
|
|
|
|
|
__bss_num_words = (__bss_end - __bss_start) >> 2;
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2015-05-12 10:43:08 -05:00
|
|
|
SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
|
|
|
/*
|
2016-09-14 16:25:55 -04:00
|
|
|
* This section is used for non-initialized objects that
|
2015-04-10 16:44:37 -07:00
|
|
|
* will not be cleared during the boot process.
|
|
|
|
*/
|
2017-06-14 16:10:20 -07:00
|
|
|
KERNEL_INPUT_SECTION(.noinit)
|
|
|
|
KERNEL_INPUT_SECTION(".noinit.*")
|
2017-07-14 08:55:51 -07:00
|
|
|
*(".kernel_noinit.*")
|
2017-06-14 16:10:20 -07:00
|
|
|
|
|
|
|
/* All stacks go in kernel's noinit, regardless of where they
|
|
|
|
* were defined.
|
|
|
|
*/
|
|
|
|
*(.stacks)
|
|
|
|
*(".stacks.*")
|
|
|
|
|
|
|
|
__kernel_ram_end = .;
|
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
|
|
|
|
|
|
|
|
#ifdef CONFIG_APPLICATION_MEMORY
|
2017-07-11 09:56:00 -07:00
|
|
|
MMU_PAGE_ALIGN
|
2017-06-14 16:10:20 -07:00
|
|
|
SECTION_DATA_PROLOGUE(_APP_DATA_SECTION_NAME, (OPTIONAL),)
|
|
|
|
{
|
|
|
|
__app_ram_start = .;
|
|
|
|
__app_data_ram_start = .;
|
|
|
|
APP_INPUT_SECTION(.data)
|
|
|
|
APP_INPUT_SECTION(".data.*")
|
|
|
|
__app_data_ram_end = .;
|
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
|
|
|
|
|
|
|
__app_data_rom_start = LOADADDR(_APP_DATA_SECTION_NAME);
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2017-06-14 16:10:20 -07:00
|
|
|
SECTION_PROLOGUE(_APP_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
|
|
|
|
{
|
|
|
|
__app_bss_start = .;
|
|
|
|
APP_INPUT_SECTION(.bss)
|
|
|
|
APP_INPUT_SECTION(".bss.*")
|
|
|
|
APP_INPUT_SECTION(COMMON)
|
|
|
|
__app_bss_end = .;
|
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
|
|
|
|
|
|
|
|
__app_bss_num_words = (__app_bss_end - __app_bss_start) >> 2;
|
|
|
|
|
|
|
|
SECTION_PROLOGUE(_APP_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
|
|
|
|
{
|
|
|
|
APP_INPUT_SECTION(.noinit)
|
|
|
|
APP_INPUT_SECTION(".noinit.*")
|
|
|
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
|
|
|
|
|
|
|
|
__app_ram_end = .;
|
|
|
|
#endif /* CONFIG_APPLICATION_MEMORY */
|
2016-11-21 14:16:11 -08:00
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
/* Define linker symbols */
|
2015-09-16 19:14:40 -04:00
|
|
|
_image_ram_end = .;
|
2017-07-11 09:07:46 -07:00
|
|
|
_image_ram_all = (PHYS_RAM_ADDR + KB(CONFIG_RAM_SIZE)) - _image_ram_start;
|
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
_end = .; /* end of image */
|
|
|
|
|
2016-10-20 08:09:32 -07:00
|
|
|
GROUP_END(RAMABLE_REGION)
|
2015-04-10 16:44:37 -07:00
|
|
|
|
2017-05-12 13:27:50 -07:00
|
|
|
#ifndef LINKER_PASS2
|
2015-04-10 16:44:37 -07:00
|
|
|
/* static interrupts */
|
2015-05-12 10:43:08 -05:00
|
|
|
SECTION_PROLOGUE(intList, (OPTIONAL),)
|
2015-04-10 16:44:37 -07:00
|
|
|
{
|
|
|
|
KEEP(*(.spurIsr))
|
|
|
|
KEEP(*(.spurNoErrIsr))
|
|
|
|
__INT_LIST_START__ = .;
|
|
|
|
LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
|
|
|
|
KEEP(*(.intList))
|
2016-07-26 14:55:41 -07:00
|
|
|
KEEP(*(.gnu.linkonce.intList.*))
|
2015-04-10 16:44:37 -07:00
|
|
|
__INT_LIST_END__ = .;
|
|
|
|
} > IDT_LIST
|
2017-05-22 11:19:52 +05:30
|
|
|
|
|
|
|
#ifdef CONFIG_X86_MMU
|
|
|
|
/* Memory management unit*/
|
|
|
|
SECTION_PROLOGUE(mmulist, (OPTIONAL),)
|
|
|
|
{
|
|
|
|
/* get size of the mmu lists needed for gen_mmu.py*/
|
|
|
|
LONG((__MMU_LIST_END__ - __MMU_LIST_START__) / __MMU_REGION_SIZEOF)
|
|
|
|
/* Get the start of mmu tables in data section so that the address
|
|
|
|
* of the page tables can be calculated.
|
|
|
|
*/
|
|
|
|
LONG(__mmu_tables_start)
|
|
|
|
__MMU_LIST_START__ = .;
|
|
|
|
KEEP(*(.mmulist))
|
|
|
|
__MMU_LIST_END__ = .;
|
|
|
|
} > MMU_LIST
|
|
|
|
#endif /* CONFIG_X86_MMU */
|
|
|
|
|
2017-05-12 13:27:50 -07:00
|
|
|
#else
|
|
|
|
/DISCARD/ :
|
|
|
|
{
|
|
|
|
KEEP(*(.spurIsr))
|
|
|
|
KEEP(*(.spurNoErrIsr))
|
|
|
|
KEEP(*(.intList))
|
|
|
|
KEEP(*(.gnu.linkonce.intList.*))
|
2017-05-22 11:19:52 +05:30
|
|
|
KEEP(*(.mmulist))
|
2017-05-12 13:27:50 -07:00
|
|
|
}
|
|
|
|
#endif
|
2016-11-21 14:16:11 -08:00
|
|
|
|
2017-05-22 11:19:52 +05:30
|
|
|
|
|
|
|
|
2016-11-21 14:16:11 -08:00
|
|
|
#ifdef CONFIG_CUSTOM_SECTIONS_LD
|
|
|
|
/* Located in project source directory */
|
|
|
|
#include <custom-sections.ld>
|
|
|
|
#endif
|
|
|
|
|
2015-04-10 16:44:37 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_XIP
|
|
|
|
/*
|
|
|
|
* Round up number of words for DATA section to ensure that XIP copies the
|
|
|
|
* entire data section. XIP copy is done in words only, so there may be up
|
|
|
|
* to 3 extra bytes copied in next section (BSS). At run time, the XIP copy
|
|
|
|
* is done first followed by clearing the BSS section.
|
|
|
|
*/
|
|
|
|
__data_size = (__data_ram_end - __data_ram_start);
|
|
|
|
__data_num_words = (__data_size + 3) >> 2;
|
2017-06-14 16:10:20 -07:00
|
|
|
#ifdef CONFIG_APPLICATION_MEMORY
|
|
|
|
__app_data_size = (__app_data_ram_end - __app_data_ram_start);
|
|
|
|
__app_data_num_words = (__app_data_size + 3) >> 2;
|
|
|
|
#endif
|
2015-04-10 16:44:37 -07:00
|
|
|
|
|
|
|
#endif
|