2015-04-10 16:44:37 -07:00
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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2015-10-06 11:00:37 -05:00
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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2015-04-10 16:44:37 -07:00
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*
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2015-10-06 11:00:37 -05:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2015-04-10 16:44:37 -07:00
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*
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2015-10-06 11:00:37 -05:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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2015-04-10 16:44:37 -07:00
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*/
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2015-12-04 10:09:39 -05:00
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/**
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* @file
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* @brief Common linker sections
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*
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2015-10-20 09:42:33 -07:00
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* This script defines the memory location of the various sections that make up
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* a Zephyr Kernel image. This file is used by the linker.
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*
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* This script places the various sections of the image according to what
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* features are enabled by the kernel's configuration options.
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*
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* For a build that does not use the execute in place (XIP) feature, the script
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* generates an image suitable for loading into and executing from RAM by
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* placing all the sections adjacent to each other. There is also no separate
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* load address for the DATA section which means it doesn't have to be copied
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* into RAM.
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*
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* For builds using XIP, there is a different load memory address (LMA) and
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* virtual memory address (VMA) for the DATA section. In this case the DATA
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* section is copied into RAM at runtime.
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*
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* When building an XIP image the data section is placed into ROM. In this
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* case, the LMA is set to __data_rom_start so the data section is concatenated
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* at the end of the RODATA section. At runtime, the DATA section is copied
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* into the RAM region so it can be accessed with read and write permission.
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*
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* Most symbols defined in the sections below are subject to be referenced in
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* the Zephyr Kernel image. If a symbol is used but not defined the linker will
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* emit an undefined symbol error.
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*
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* Please do not change the order of the section as the nanokernel expects this
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* order when programming the MMU.
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2015-07-01 17:22:39 -04:00
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*/
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2015-04-10 16:44:37 -07:00
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#define _LINKER
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#define _ASMLANGUAGE /* Needed to include mmustructs.h */
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#include <linker-defs.h>
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#include <offsets.h>
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#include <misc/util.h>
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2016-01-07 13:26:27 -08:00
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#include <arch/cpu.h>
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2015-04-10 16:44:37 -07:00
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#define MMU_PAGE_SIZE KB(4)
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#include <linker-tool.h>
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/* SECTIONS definitions */
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SECTIONS
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{
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GROUP_START(ROMABLE_REGION)
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2015-09-16 19:14:40 -04:00
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_image_rom_start = PHYS_LOAD_ADDR;
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2015-09-21 17:57:39 -04:00
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_image_text_start = PHYS_LOAD_ADDR;
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2015-09-16 19:14:40 -04:00
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2016-04-29 08:07:22 -04:00
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#ifdef CONFIG_VERSION_HEADER
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SECTION_PROLOGUE (version_header_section, (OPTIONAL),)
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{
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*(.version_header)
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KEEP(*(".version_header*"))
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(_TEXT_SECTION_NAME, (OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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{
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2015-09-16 19:14:40 -04:00
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2015-04-10 16:44:37 -07:00
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*(.text_start)
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*(".text_start.*")
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*(.text)
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*(".text.*")
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2016-01-13 13:02:56 -05:00
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*(.gnu.linkonce.t.*)
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2015-04-10 16:44:37 -07:00
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*(.eh_frame)
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*(.init)
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*(.fini)
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*(.eini)
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(ROMABLE_REGION)
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2015-09-21 17:57:39 -04:00
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_image_text_end = .;
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2016-01-13 13:02:56 -05:00
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#ifdef CONFIG_CPLUSPLUS
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SECTION_PROLOGUE(_CTOR_SECTION_NAME, ,)
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{
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/*
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* The compiler fills the constructor pointers table below, hence symbol
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* __CTOR_LIST__ must be aligned on 4 byte boundary.
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* To align with the C++ standard, the first elment of the array
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* contains the number of actual constructors. The last element is
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* NULL.
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*/
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. = ALIGN(4);
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__CTOR_LIST__ = .;
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LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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KEEP(*(SORT_BY_NAME(".ctors*")))
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LONG(0)
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__CTOR_END__ = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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SECTION_PROLOGUE(init_array, (OPTIONAL),)
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{
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. = ALIGN(4);
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__init_array_start = .;
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KEEP(*(SORT_BY_NAME(".init_array*")))
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__init_array_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(devconfig, (OPTIONAL),)
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2015-06-01 11:11:39 -07:00
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{
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__devconfig_start = .;
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*(".devconfig.*")
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KEEP(*(SORT_BY_NAME(".devconfig*")))
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__devconfig_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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2015-04-10 16:44:37 -07:00
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2016-03-23 12:01:06 +01:00
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SECTION_PROLOGUE(gpio_compat, (OPTIONAL),)
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{
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__gpio_compat_start = .;
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*(".gpio_compat.*")
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KEEP(*(SORT_BY_NAME(".gpio_compat*")))
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__gpio_compat_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(_RODATA_SECTION_NAME, (OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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{
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*(.rodata)
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*(".rodata.*")
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2016-01-13 13:02:56 -05:00
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*(.gnu.linkonce.r.*)
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2016-01-20 15:01:03 -08:00
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#if ALL_DYN_STUBS == 0
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2016-01-07 13:26:27 -08:00
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IDT_MEMORY
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#endif
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2016-01-27 12:19:15 -08:00
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#ifndef CONFIG_MVIC
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2015-10-09 16:23:25 -04:00
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IRQ_TO_INTERRUPT_VECTOR_MEMORY
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2016-01-27 12:19:15 -08:00
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#endif
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2015-04-10 16:44:37 -07:00
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(ROMABLE_REGION)
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2015-09-16 19:14:40 -04:00
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_image_rom_end = .;
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2015-04-10 16:44:37 -07:00
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__data_rom_start = ALIGN(4); /* XIP imaged DATA ROM start addr */
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GROUP_END(ROMABLE_REGION)
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/* RAM */
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GROUP_START(RAM)
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#if defined(CONFIG_XIP)
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2015-10-20 09:42:34 -07:00
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SECTION_AT_PROLOGUE(_DATA_SECTION_NAME, (OPTIONAL), , __data_rom_start)
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2015-04-10 16:44:37 -07:00
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#else
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(_DATA_SECTION_NAME, (OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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#endif
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{
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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2015-09-16 19:14:40 -04:00
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_image_ram_start = .;
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2015-04-10 16:44:37 -07:00
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__data_ram_start = .;
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*(.data)
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*(".data.*")
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2016-01-20 15:01:03 -08:00
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#if ALL_DYN_STUBS > 0
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2015-04-10 16:44:37 -07:00
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IDT_MEMORY
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2016-01-07 13:26:27 -08:00
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#endif
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2016-01-20 15:01:03 -08:00
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#if ALL_DYN_IRQ_STUBS > 0
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2015-10-02 13:26:20 -04:00
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INTERRUPT_VECTORS_ALLOCATED_MEMORY
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2016-01-07 13:26:27 -08:00
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#endif
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2015-04-10 16:44:37 -07:00
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. = ALIGN(4);
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} GROUP_LINK_IN(RAM)
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(initlevel, (OPTIONAL),)
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2015-06-01 11:11:39 -07:00
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{
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2015-10-14 11:17:20 -04:00
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DEVICE_INIT_SECTIONS()
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2015-07-29 13:34:23 -04:00
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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2015-06-01 11:11:39 -07:00
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} GROUP_LINK_IN(RAM)
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(_k_task_list, ALIGN(4), ALIGN(4))
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2015-07-23 17:17:40 -07:00
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{
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_k_task_list_start = .;
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*(._k_task_list.public.*)
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2015-07-24 09:59:50 -07:00
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*(._k_task_list.private.*)
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2015-07-23 17:17:40 -07:00
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_k_task_list_idle_start = .;
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*(._k_task_list.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_list*")))
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_k_task_list_end = .;
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} GROUP_LINK_IN(RAM)
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(_k_task_ptr, (OPTIONAL),)
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2015-09-16 09:35:22 -07:00
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{
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_k_task_ptr_start = .;
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*(._k_task_ptr.public.*)
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*(._k_task_ptr.private.*)
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*(._k_task_ptr.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_ptr*")))
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_k_task_ptr_end = .;
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} GROUP_LINK_IN(RAM)
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(_k_pipe_ptr, (OPTIONAL),)
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2015-07-27 15:00:16 -07:00
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{
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_k_pipe_ptr_start = .;
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*(._k_pipe_ptr.public.*)
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2015-07-28 11:18:35 -07:00
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*(._k_pipe_ptr.private.*)
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2015-07-27 15:00:16 -07:00
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KEEP(*(SORT_BY_NAME("._k_pipe_ptr*")))
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_k_pipe_ptr_end = .;
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} GROUP_LINK_IN(RAM)
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2015-10-23 10:33:46 -07:00
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SECTION_PROLOGUE(_k_mem_map_ptr, (OPTIONAL),)
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2015-08-03 18:01:08 -07:00
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{
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_k_mem_map_ptr_start = .;
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*(._k_mem_map_ptr.public.*)
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microkernel: introduce support for private memory maps
This enable defining memory maps in source code in addition to
defining in MDEF files. This introduces the macro
DEFINE_MEM_MAP(mem_map_name, ...). The memory maps created this
way are the same, in functionality, as those defined in MDEF
files. They can be manipulated by the standard microkernel
memory map APIs.
Define the memory map using:
DEFINE_MEM_MAP(mem_map1, blocks, block_size);
and "mem_map1" can be used, for example:
task_mem_map_alloc(mem_map1, ...);
or,
task_mem_map_free(mem_map1, ...);
etc.
To use the memory map defined in another source file, simply add:
extern const kmemory_map_t mem_map1;
to the desired C or header file.
Change-Id: I9c551b90f9d0a95f961fd8ec1c5278c2ea44312d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-08-04 10:15:43 -07:00
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*(._k_mem_map_ptr.private.*)
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2015-08-03 18:01:08 -07:00
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KEEP(*(SORT_BY_NAME("._k_mem_map_ptr*")))
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_k_mem_map_ptr_end = .;
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} GROUP_LINK_IN(RAM)
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2015-10-21 11:04:58 -07:00
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SECTION_PROLOGUE(_k_event_list, (OPTIONAL),)
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{
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_k_event_list_start = .;
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*(._k_event_list.event.*)
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KEEP(*(SORT_BY_NAME("._k_event_list*")))
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_k_event_list_end = .;
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} GROUP_LINK_IN(RAM)
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2015-04-10 16:44:37 -07:00
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__data_ram_end = .;
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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{
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/*
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* For performance, BSS section is forced to be both 4 byte aligned and
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* a multiple of 4 bytes.
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*/
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. = ALIGN(4);
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__bss_start = .;
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*(.bss)
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*(".bss.*")
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COMMON_SYMBOLS
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/*
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2015-07-27 09:47:56 -04:00
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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2015-04-10 16:44:37 -07:00
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*/
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. = ALIGN(4);
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__bss_end = .;
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(RAM)
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#ifdef CONFIG_XIP
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/*
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* Ensure linker keeps sections in correct order, despite the fact
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* the previous section specified a load address and this no-load
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* section doesn't.
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*/
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GROUP_FOLLOWS_AT(RAM)
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#endif
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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{
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/*
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* This section is used for non-intialized objects that
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* will not be cleared during the boot process.
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*/
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*(.noinit)
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*(".noinit.*")
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INT_STUB_NOINIT
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} GROUP_LINK_IN(RAM)
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/* Define linker symbols */
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2015-09-16 19:14:40 -04:00
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_image_ram_end = .;
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2015-04-10 16:44:37 -07:00
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_end = .; /* end of image */
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. = ALIGN(MMU_PAGE_SIZE);
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__bss_num_words = (__bss_end - __bss_start) >> 2;
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GROUP_END(RAM)
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/* static interrupts */
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2015-05-12 10:43:08 -05:00
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SECTION_PROLOGUE(intList, (OPTIONAL),)
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2015-04-10 16:44:37 -07:00
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{
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KEEP(*(.spurIsr))
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KEEP(*(.spurNoErrIsr))
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__INT_LIST_START__ = .;
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LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
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KEEP(*(.intList))
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__INT_LIST_END__ = .;
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} > IDT_LIST
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2015-11-30 15:43:12 -05:00
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/* verify we don't have rogue .init_<something> initlevel sections */
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SECTION_PROLOGUE(initlevel_error, (OPTIONAL), )
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{
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DEVICE_INIT_UNDEFINED_SECTION()
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}
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ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.")
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2015-04-10 16:44:37 -07:00
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}
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#ifdef CONFIG_XIP
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/*
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* Round up number of words for DATA section to ensure that XIP copies the
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* entire data section. XIP copy is done in words only, so there may be up
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* to 3 extra bytes copied in next section (BSS). At run time, the XIP copy
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* is done first followed by clearing the BSS section.
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*/
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__data_size = (__data_ram_end - __data_ram_start);
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__data_num_words = (__data_size + 3) >> 2;
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#endif
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