2017-04-28 09:07:20 -07:00
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/*
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* Copyright (c) 2017 Justin Watson
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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2017-05-21 02:47:32 +02:00
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#include <dt-bindings/i2c/i2c.h>
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2017-04-28 09:07:20 -07:00
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/ {
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cpus {
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2017-07-15 21:57:32 +03:00
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#address-cells = <1>;
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#size-cells = <0>;
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2019-06-21 14:47:08 +02:00
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cpu0: cpu@0 {
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2017-07-15 21:57:32 +03:00
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device_type = "cpu";
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2017-04-28 09:07:20 -07:00
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compatible = "arm,cortex-m4";
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2017-07-15 21:57:32 +03:00
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reg = <0>;
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2017-04-28 09:07:20 -07:00
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};
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};
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2017-07-21 15:43:01 +03:00
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sram0: memory@20070000 {
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2017-07-20 07:59:29 -05:00
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compatible = "mmio-sram";
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2017-04-28 09:07:20 -07:00
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reg = <0x20070000 0x18000>;
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};
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2017-07-21 15:43:01 +03:00
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flash0: flash@80000 {
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2018-01-22 09:28:58 -06:00
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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2017-04-28 09:07:20 -07:00
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reg = <0x00080000 0x80000>;
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};
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soc {
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2018-11-09 05:53:08 -06:00
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wdog: watchdog@400e1a50 {
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2018-10-24 22:16:25 -07:00
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compatible = "atmel,sam-watchdog";
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2018-11-09 05:53:08 -06:00
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reg = <0x400e1a50 0xc>;
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2018-10-24 22:16:25 -07:00
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interrupts = <4 0>;
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peripheral-id = <4>;
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label = "WATCHDOG_0";
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status = "disabled";
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};
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2018-11-09 05:53:08 -06:00
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i2c0: i2c@4008c000 {
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2017-05-21 02:47:32 +02:00
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compatible = "atmel,sam-i2c-twi";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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2018-11-09 05:53:08 -06:00
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reg = <0x4008c000 0x128>;
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2017-05-21 02:47:32 +02:00
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interrupts = <22 0>;
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peripheral-id = <22>;
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label = "I2C_0";
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status = "disabled";
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2019-06-19 00:20:17 -05:00
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#address-cells = <1>;
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#size-cells = <0>;
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2017-05-21 02:47:32 +02:00
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};
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i2c1: i2c@40090000 {
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compatible = "atmel,sam-i2c-twi";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x40090000 0x128>;
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interrupts = <23 0>;
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peripheral-id = <23>;
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label = "I2C_1";
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status = "disabled";
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2019-06-19 00:20:17 -05:00
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#address-cells = <1>;
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#size-cells = <0>;
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2017-05-21 02:47:32 +02:00
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};
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2018-11-09 05:53:08 -06:00
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uart0: uart@400e0800 {
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2017-06-29 16:44:38 -07:00
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compatible = "atmel,sam-uart";
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2018-11-09 05:53:08 -06:00
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reg = <0x400e0800 0x124>;
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2018-02-19 21:58:07 -08:00
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interrupts = <8 1>;
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2017-10-15 15:27:47 +02:00
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peripheral-id = <8>;
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2017-04-28 09:07:20 -07:00
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status = "disabled";
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2017-05-16 21:14:09 -05:00
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label = "UART_0";
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2017-04-28 09:07:20 -07:00
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};
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2017-06-29 16:44:38 -07:00
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usart0: usart@40098000 {
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compatible = "atmel,sam-usart";
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reg = <0x40098000 0x130>;
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interrupts = <17 0>;
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2017-10-15 15:27:47 +02:00
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peripheral-id = <17>;
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2017-06-29 16:44:38 -07:00
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status = "disabled";
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label = "USART_0";
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};
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2018-11-09 05:53:08 -06:00
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usart1: usart@4009c000 {
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2017-06-29 16:44:38 -07:00
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compatible = "atmel,sam-usart";
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2018-11-09 05:53:08 -06:00
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reg = <0x4009c000 0x130>;
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2017-06-29 16:44:38 -07:00
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interrupts = <18 0>;
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2017-10-15 15:27:47 +02:00
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peripheral-id = <18>;
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2017-06-29 16:44:38 -07:00
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status = "disabled";
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label = "USART_1";
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};
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2018-11-09 05:53:08 -06:00
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usart2: usart@400a0000 {
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2017-06-29 16:44:38 -07:00
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compatible = "atmel,sam-usart";
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2018-11-09 05:53:08 -06:00
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reg = <0x400a0000 0x130>;
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2017-10-18 18:36:37 +02:00
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interrupts = <19 0>;
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2017-10-15 15:27:47 +02:00
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peripheral-id = <19>;
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2017-06-29 16:44:38 -07:00
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status = "disabled";
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label = "USART_2";
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};
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2018-11-09 05:53:08 -06:00
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usart3: usart@400a4000 {
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2017-06-29 16:44:38 -07:00
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compatible = "atmel,sam-usart";
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2018-11-09 05:53:08 -06:00
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reg = <0x400a4000 0x130>;
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2017-06-29 16:44:38 -07:00
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interrupts = <20 0>;
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2017-10-15 15:27:47 +02:00
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peripheral-id = <20>;
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2017-06-29 16:44:38 -07:00
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status = "disabled";
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label = "USART_3";
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};
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2017-04-28 09:07:20 -07:00
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};
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};
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&nvic {
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2017-06-08 10:02:41 -07:00
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arm,num-irq-priority-bits = <4>;
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2017-04-28 09:07:20 -07:00
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};
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