2019-04-06 15:08:09 +02:00
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/* SPDX-License-Identifier: Apache-2.0 */
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2018-05-14 13:10:47 +02:00
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#include "skeleton.dtsi"
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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2020-03-27 18:22:55 +01:00
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cpu: cpu@0 {
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2018-05-14 13:10:47 +02:00
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device_type = "cpu";
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2020-03-27 18:22:55 +01:00
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compatible = "qemu,nios2-zephyr";
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2018-05-14 13:10:47 +02:00
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reg = <0>;
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2020-03-27 18:22:55 +01:00
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interrupt-controller;
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#interrupt-cells = <1>;
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2018-05-14 13:10:47 +02:00
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};
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};
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2019-07-02 18:49:09 +02:00
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flash0: flash@420000 {
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2018-09-21 01:39:55 +02:00
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compatible = "soc-nv-flash";
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2018-05-14 13:10:47 +02:00
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reg = <0x420000 0x20000>;
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};
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sram0: memory@400000 {
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compatible = "mmio-sram";
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reg = <0x400000 0x20000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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2020-03-27 18:22:55 +01:00
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interrupt-parent = <&cpu>;
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2018-05-14 13:10:47 +02:00
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ranges;
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2018-09-14 10:55:04 +02:00
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jtag_uart: uart@201000 {
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2020-10-20 22:05:49 +02:00
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compatible = "altr,jtag-uart";
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2018-05-14 13:10:47 +02:00
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reg = <0x201000 0x400>;
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2023-01-19 08:27:04 +01:00
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interrupts = <0>;
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2018-05-14 13:10:47 +02:00
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status = "disabled";
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};
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2018-09-14 10:55:04 +02:00
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ns16550_uart: uart@440000 {
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compatible = "ns16550";
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reg = <0x440000 0x400>;
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2020-03-27 18:22:55 +01:00
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interrupts = <1>;
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2020-03-09 15:37:20 +01:00
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clock-frequency = <50000000>;
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2022-06-15 13:59:22 +02:00
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reg-shift = <2>;
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2018-09-14 10:55:04 +02:00
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status = "disabled";
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};
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2018-05-14 13:10:47 +02:00
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};
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};
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