2017-03-14 22:16:37 +01:00
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/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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2018-08-16 00:41:21 +02:00
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* @brief UART driver for the SiFive Freedom Processor
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2017-03-14 22:16:37 +01:00
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*/
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2020-03-10 23:24:43 +01:00
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#define DT_DRV_COMPAT sifive_uart0
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2022-05-06 10:25:46 +02:00
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <zephyr/drivers/uart.h>
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#include <zephyr/drivers/pinctrl.h>
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2022-03-31 19:51:54 +02:00
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#include <soc.h>
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2022-10-17 10:24:11 +02:00
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#include <zephyr/irq.h>
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2017-03-14 22:16:37 +01:00
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#define RXDATA_EMPTY (1 << 31) /* Receive FIFO Empty */
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#define RXDATA_MASK 0xFF /* Receive Data Mask */
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#define TXDATA_FULL (1 << 31) /* Transmit FIFO Full */
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#define TXCTRL_TXEN (1 << 0) /* Activate Tx Channel */
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#define RXCTRL_RXEN (1 << 0) /* Activate Rx Channel */
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#define IE_TXWM (1 << 0) /* TX Interrupt Enable/Pending */
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#define IE_RXWM (1 << 1) /* RX Interrupt Enable/Pending */
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/*
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* RX/TX Threshold count to generate TX/RX Interrupts.
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* Used by txctrl and rxctrl registers
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*/
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#define CTRL_CNT(x) (((x) & 0x07) << 16)
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2018-08-16 00:41:21 +02:00
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struct uart_sifive_regs_t {
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2020-05-27 18:26:57 +02:00
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uint32_t tx;
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uint32_t rx;
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uint32_t txctrl;
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uint32_t rxctrl;
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uint32_t ie;
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uint32_t ip;
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uint32_t div;
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2017-03-14 22:16:37 +01:00
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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typedef void (*irq_cfg_func_t)(void);
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#endif
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2018-08-16 00:41:21 +02:00
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struct uart_sifive_device_config {
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2022-03-22 09:38:57 +01:00
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uintptr_t port;
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uint32_t sys_clk_freq;
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uint32_t baud_rate;
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uint32_t rxcnt_irq;
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uint32_t txcnt_irq;
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const struct pinctrl_dev_config *pcfg;
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2017-03-14 22:16:37 +01:00
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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2022-03-22 09:38:57 +01:00
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irq_cfg_func_t cfg_func;
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2017-03-14 22:16:37 +01:00
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#endif
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};
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2018-08-16 00:41:21 +02:00
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struct uart_sifive_data {
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2017-03-14 22:16:37 +01:00
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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2018-07-16 20:12:26 +02:00
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uart_irq_callback_user_data_t callback;
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void *cb_data;
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2017-03-14 22:16:37 +01:00
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#endif
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};
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#define DEV_UART(dev) \
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2022-01-18 16:58:32 +01:00
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((struct uart_sifive_regs_t *) \
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((const struct uart_sifive_device_config * const)(dev)->config)->port)
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2017-03-14 22:16:37 +01:00
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/**
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* @brief Output a character in polled mode.
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*
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* Writes data to tx register if transmitter is not full.
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*
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* @param dev UART device struct
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* @param c Character to send
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_poll_out(const struct device *dev,
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2017-03-14 22:16:37 +01:00
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unsigned char c)
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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/* Wait while TX FIFO is full */
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2019-06-04 16:52:23 +02:00
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while (uart->tx & TXDATA_FULL) {
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}
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2017-03-14 22:16:37 +01:00
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uart->tx = (int)c;
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}
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/**
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* @brief Poll the device for input.
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*
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* @param dev UART device struct
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* @param c Pointer to character
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*
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* @return 0 if a character arrived, -1 if the input buffer if empty.
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_poll_in(const struct device *dev, unsigned char *c)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2020-05-27 18:26:57 +02:00
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uint32_t val = uart->rx;
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2017-03-14 22:16:37 +01:00
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2019-06-04 16:52:23 +02:00
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if (val & RXDATA_EMPTY) {
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2017-03-14 22:16:37 +01:00
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return -1;
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2019-06-04 16:52:23 +02:00
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}
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2017-03-14 22:16:37 +01:00
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*c = (unsigned char)(val & RXDATA_MASK);
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return 0;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/**
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* @brief Fill FIFO with data
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*
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* @param dev UART device struct
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* @param tx_data Data to transmit
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* @param size Number of bytes to send
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*
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* @return Number of bytes sent
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_fifo_fill(const struct device *dev,
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const uint8_t *tx_data,
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int size)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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int i;
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for (i = 0; i < size && !(uart->tx & TXDATA_FULL); i++)
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uart->tx = (int)tx_data[i];
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return i;
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}
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/**
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* @brief Read data from FIFO
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*
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* @param dev UART device struct
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* @param rxData Data container
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* @param size Container size
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*
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* @return Number of bytes read
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_fifo_read(const struct device *dev,
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uint8_t *rx_data,
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const int size)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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int i;
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2020-05-27 18:26:57 +02:00
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uint32_t val;
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2017-03-14 22:16:37 +01:00
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for (i = 0; i < size; i++) {
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val = uart->rx;
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if (val & RXDATA_EMPTY)
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break;
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2020-05-27 18:26:57 +02:00
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rx_data[i] = (uint8_t)(val & RXDATA_MASK);
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2017-03-14 22:16:37 +01:00
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}
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return i;
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}
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/**
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* @brief Enable TX interrupt in ie register
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*
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* @param dev UART device struct
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_tx_enable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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uart->ie |= IE_TXWM;
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}
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/**
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* @brief Disable TX interrupt in ie register
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*
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* @param dev UART device struct
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_tx_disable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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uart->ie &= ~IE_TXWM;
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}
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/**
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* @brief Check if Tx IRQ has been raised
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*
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* @param dev UART device struct
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*
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* @return 1 if an IRQ is ready, 0 otherwise
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_irq_tx_ready(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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return !!(uart->ip & IE_TXWM);
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}
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/**
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* @brief Check if nothing remains to be transmitted
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*
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* @param dev UART device struct
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*
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* @return 1 if nothing remains to be transmitted, 0 otherwise
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_irq_tx_complete(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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/*
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2019-06-18 20:45:40 +02:00
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* No TX EMPTY flag for this controller,
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2017-03-14 22:16:37 +01:00
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* just check if TX FIFO is not full
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*/
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return !(uart->tx & TXDATA_FULL);
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}
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/**
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* @brief Enable RX interrupt in ie register
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*
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* @param dev UART device struct
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_rx_enable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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uart->ie |= IE_RXWM;
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}
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/**
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* @brief Disable RX interrupt in ie register
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*
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* @param dev UART device struct
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_rx_disable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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uart->ie &= ~IE_RXWM;
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}
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/**
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* @brief Check if Rx IRQ has been raised
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*
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* @param dev UART device struct
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*
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* @return 1 if an IRQ is ready, 0 otherwise
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_irq_rx_ready(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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return !!(uart->ip & IE_RXWM);
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}
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/* No error interrupt for this controller */
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_err_enable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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ARG_UNUSED(dev);
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}
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_err_disable(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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ARG_UNUSED(dev);
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}
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/**
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* @brief Check if any IRQ is pending
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*
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* @param dev UART device struct
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*
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* @return 1 if an IRQ is pending, 0 otherwise
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*/
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_irq_is_pending(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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2018-08-16 00:41:21 +02:00
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volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
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2017-03-14 22:16:37 +01:00
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return !!(uart->ip & (IE_RXWM | IE_TXWM));
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}
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2020-04-30 20:33:38 +02:00
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static int uart_sifive_irq_update(const struct device *dev)
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2017-03-14 22:16:37 +01:00
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{
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return 1;
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}
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/**
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* @brief Set the callback function pointer for IRQ.
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*
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* @param dev UART device struct
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* @param cb Callback function pointer.
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*/
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2020-04-30 20:33:38 +02:00
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static void uart_sifive_irq_callback_set(const struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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2017-03-14 22:16:37 +01:00
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{
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2022-01-18 16:58:32 +01:00
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struct uart_sifive_data *data = dev->data;
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2017-03-14 22:16:37 +01:00
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data->callback = cb;
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2018-07-16 20:12:26 +02:00
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data->cb_data = cb_data;
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2017-03-14 22:16:37 +01:00
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}
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isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs
This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.
Note that only the ISR passed to IRQ_CONNECT are of interest here.
In order to do so, the script fix_isr.py below is necessary:
from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os
cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
...
(
const struct device *D = (const struct device *)P;
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const struct device *D = P;
)
...
}
@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
...
const struct device *D;
...
(
D = (const struct device *)P;
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D = P;
)
...
}
@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
...
}
@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);
@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
...
}
@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
...
}
"""
def find_isr(fn):
db = []
data = None
start = 0
try:
with open(fn, 'r+') as f:
data = str(mmap.mmap(f.fileno(), 0).read())
except Exception as e:
return db
while True:
isr = ""
irq = data.find('IRQ_CONNECT', start)
while irq > -1:
p = 1
arg = 1
p_o = data.find('(', irq)
if p_o < 0:
irq = -1
break;
pos = p_o + 1
while p > 0:
if data[pos] == ')':
p -= 1
elif data[pos] == '(':
p += 1
elif data[pos] == ',' and p == 1:
arg += 1
if arg == 3:
isr += data[pos]
pos += 1
isr = isr.strip(',\\n\\t ')
if isr not in db and len(isr) > 0:
db.append(isr)
start = pos
break
if irq < 0:
break
return db
def patch_isr(fn, isr_list):
if len(isr_list) <= 0:
return
for isr in isr_list:
tmplt = cocci_template.replace('<!fn!>', isr)
with open('/tmp/isr_fix.cocci', 'w') as f:
f.write(tmplt)
cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]
subprocess.run(cmd)
def process_files(path):
if path.is_file() and path.suffix in ['.h', '.c']:
p = str(path.parent) + '/' + path.name
isr_list = find_isr(p)
patch_isr(p, isr_list)
elif path.is_dir():
for p in path.iterdir():
process_files(p)
if len(sys.argv) < 2:
print("You need to provide a dir/file path")
sys.exit(1)
process_files(Path(sys.argv[1]))
And is run: ./fix_isr.py <zephyr root directory>
Finally, some files needed manual fixes such.
Fixes #27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-06-17 14:58:56 +02:00
|
|
|
static void uart_sifive_irq_handler(const struct device *dev)
|
2017-03-14 22:16:37 +01:00
|
|
|
{
|
2022-01-18 16:58:32 +01:00
|
|
|
struct uart_sifive_data *data = dev->data;
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
if (data->callback)
|
2020-06-24 15:47:15 +02:00
|
|
|
data->callback(dev, data->cb_data);
|
2017-03-14 22:16:37 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
|
|
|
|
|
|
|
|
2020-04-30 20:33:38 +02:00
|
|
|
static int uart_sifive_init(const struct device *dev)
|
2017-03-14 22:16:37 +01:00
|
|
|
{
|
2022-01-18 16:58:32 +01:00
|
|
|
const struct uart_sifive_device_config * const cfg = dev->config;
|
2018-08-16 00:41:21 +02:00
|
|
|
volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
|
2022-03-22 09:38:57 +01:00
|
|
|
#ifdef CONFIG_PINCTRL
|
|
|
|
int ret;
|
|
|
|
#endif
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
/* Enable TX and RX channels */
|
2019-05-23 18:47:07 +02:00
|
|
|
uart->txctrl = TXCTRL_TXEN | CTRL_CNT(cfg->txcnt_irq);
|
|
|
|
uart->rxctrl = RXCTRL_RXEN | CTRL_CNT(cfg->rxcnt_irq);
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
/* Set baud rate */
|
|
|
|
uart->div = cfg->sys_clk_freq / cfg->baud_rate - 1;
|
|
|
|
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
|
|
|
/* Ensure that uart IRQ is disabled initially */
|
2018-11-29 20:12:22 +01:00
|
|
|
uart->ie = 0U;
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
/* Setup IRQ handler */
|
|
|
|
cfg->cfg_func();
|
|
|
|
#endif
|
|
|
|
|
2022-03-22 09:38:57 +01:00
|
|
|
#ifdef CONFIG_PINCTRL
|
|
|
|
ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-03-14 22:16:37 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
static const struct uart_driver_api uart_sifive_driver_api = {
|
|
|
|
.poll_in = uart_sifive_poll_in,
|
|
|
|
.poll_out = uart_sifive_poll_out,
|
2017-03-14 22:16:37 +01:00
|
|
|
.err_check = NULL,
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
.fifo_fill = uart_sifive_fifo_fill,
|
|
|
|
.fifo_read = uart_sifive_fifo_read,
|
|
|
|
.irq_tx_enable = uart_sifive_irq_tx_enable,
|
|
|
|
.irq_tx_disable = uart_sifive_irq_tx_disable,
|
|
|
|
.irq_tx_ready = uart_sifive_irq_tx_ready,
|
|
|
|
.irq_tx_complete = uart_sifive_irq_tx_complete,
|
|
|
|
.irq_rx_enable = uart_sifive_irq_rx_enable,
|
|
|
|
.irq_rx_disable = uart_sifive_irq_rx_disable,
|
|
|
|
.irq_rx_ready = uart_sifive_irq_rx_ready,
|
|
|
|
.irq_err_enable = uart_sifive_irq_err_enable,
|
|
|
|
.irq_err_disable = uart_sifive_irq_err_disable,
|
|
|
|
.irq_is_pending = uart_sifive_irq_is_pending,
|
|
|
|
.irq_update = uart_sifive_irq_update,
|
|
|
|
.irq_callback_set = uart_sifive_irq_callback_set,
|
2017-03-14 22:16:37 +01:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
#ifdef CONFIG_UART_SIFIVE_PORT_0
|
2017-03-14 22:16:37 +01:00
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
static struct uart_sifive_data uart_sifive_data_0;
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
static void uart_sifive_irq_cfg_func_0(void);
|
2017-03-14 22:16:37 +01:00
|
|
|
#endif
|
|
|
|
|
2022-03-22 09:38:57 +01:00
|
|
|
PINCTRL_DT_INST_DEFINE(0);
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
static const struct uart_sifive_device_config uart_sifive_dev_cfg_0 = {
|
2020-03-10 23:24:43 +01:00
|
|
|
.port = DT_INST_REG_ADDR(0),
|
2022-03-31 19:51:54 +02:00
|
|
|
.sys_clk_freq = SIFIVE_PERIPHERAL_CLOCK_FREQUENCY,
|
2020-03-10 23:24:43 +01:00
|
|
|
.baud_rate = DT_INST_PROP(0, current_speed),
|
2018-08-16 00:41:21 +02:00
|
|
|
.rxcnt_irq = CONFIG_UART_SIFIVE_PORT_0_RXCNT_IRQ,
|
|
|
|
.txcnt_irq = CONFIG_UART_SIFIVE_PORT_0_TXCNT_IRQ,
|
2022-03-22 09:38:57 +01:00
|
|
|
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
|
2017-03-14 22:16:37 +01:00
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
.cfg_func = uart_sifive_irq_cfg_func_0,
|
2017-03-14 22:16:37 +01:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2020-12-11 17:12:30 +01:00
|
|
|
DEVICE_DT_INST_DEFINE(0,
|
2018-08-16 00:41:21 +02:00
|
|
|
uart_sifive_init,
|
2021-04-28 12:01:21 +02:00
|
|
|
NULL,
|
2018-08-16 00:41:21 +02:00
|
|
|
&uart_sifive_data_0, &uart_sifive_dev_cfg_0,
|
2021-10-14 16:38:10 +02:00
|
|
|
PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY,
|
2018-08-16 00:41:21 +02:00
|
|
|
(void *)&uart_sifive_driver_api);
|
2017-03-14 22:16:37 +01:00
|
|
|
|
2022-03-22 09:38:57 +01:00
|
|
|
|
2017-03-14 22:16:37 +01:00
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
static void uart_sifive_irq_cfg_func_0(void)
|
2017-03-14 22:16:37 +01:00
|
|
|
{
|
2020-12-15 16:58:32 +01:00
|
|
|
IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
|
2020-12-11 17:12:30 +01:00
|
|
|
uart_sifive_irq_handler, DEVICE_DT_INST_GET(0),
|
2017-03-14 22:16:37 +01:00
|
|
|
0);
|
|
|
|
|
2020-03-10 23:24:43 +01:00
|
|
|
irq_enable(DT_INST_IRQN(0));
|
2017-03-14 22:16:37 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
#endif /* CONFIG_UART_SIFIVE_PORT_0 */
|
2017-03-14 22:16:37 +01:00
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
#ifdef CONFIG_UART_SIFIVE_PORT_1
|
2017-03-14 22:16:37 +01:00
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
static struct uart_sifive_data uart_sifive_data_1;
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
static void uart_sifive_irq_cfg_func_1(void);
|
2017-03-14 22:16:37 +01:00
|
|
|
#endif
|
|
|
|
|
2022-03-22 09:38:57 +01:00
|
|
|
PINCTRL_DT_INST_DEFINE(1);
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
static const struct uart_sifive_device_config uart_sifive_dev_cfg_1 = {
|
2020-03-10 23:24:43 +01:00
|
|
|
.port = DT_INST_REG_ADDR(1),
|
2022-03-31 19:51:54 +02:00
|
|
|
.sys_clk_freq = SIFIVE_PERIPHERAL_CLOCK_FREQUENCY,
|
2020-03-10 23:24:43 +01:00
|
|
|
.baud_rate = DT_INST_PROP(1, current_speed),
|
2018-08-16 00:41:21 +02:00
|
|
|
.rxcnt_irq = CONFIG_UART_SIFIVE_PORT_1_RXCNT_IRQ,
|
|
|
|
.txcnt_irq = CONFIG_UART_SIFIVE_PORT_1_TXCNT_IRQ,
|
2022-03-22 09:38:57 +01:00
|
|
|
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(1),
|
2017-03-14 22:16:37 +01:00
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
.cfg_func = uart_sifive_irq_cfg_func_1,
|
2017-03-14 22:16:37 +01:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2020-12-11 17:12:30 +01:00
|
|
|
DEVICE_DT_INST_DEFINE(1,
|
2018-08-16 00:41:21 +02:00
|
|
|
uart_sifive_init,
|
2021-04-28 12:01:21 +02:00
|
|
|
NULL,
|
2018-08-16 00:41:21 +02:00
|
|
|
&uart_sifive_data_1, &uart_sifive_dev_cfg_1,
|
2021-10-14 16:38:10 +02:00
|
|
|
PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY,
|
2018-08-16 00:41:21 +02:00
|
|
|
(void *)&uart_sifive_driver_api);
|
2017-03-14 22:16:37 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
2018-08-16 00:41:21 +02:00
|
|
|
static void uart_sifive_irq_cfg_func_1(void)
|
2017-03-14 22:16:37 +01:00
|
|
|
{
|
2020-12-15 16:58:32 +01:00
|
|
|
IRQ_CONNECT(DT_INST_IRQN(1), DT_INST_IRQ(1, priority),
|
2020-12-11 17:12:30 +01:00
|
|
|
uart_sifive_irq_handler, DEVICE_DT_INST_GET(1),
|
2017-03-14 22:16:37 +01:00
|
|
|
0);
|
|
|
|
|
2020-03-10 23:24:43 +01:00
|
|
|
irq_enable(DT_INST_IRQN(1));
|
2017-03-14 22:16:37 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2018-08-16 00:41:21 +02:00
|
|
|
#endif /* CONFIG_UART_SIFIVE_PORT_1 */
|