2017-08-26 15:43:53 +02:00
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2020-03-24 20:11:52 +01:00
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#define DT_DRV_COMPAT nxp_kinetis_sim
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2017-08-26 15:43:53 +02:00
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#include <errno.h>
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#include <soc.h>
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2022-05-06 10:25:46 +02:00
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/dt-bindings/clock/kinetis_sim.h>
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2017-08-26 15:43:53 +02:00
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#include <fsl_clock.h>
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2018-09-17 19:21:21 +02:00
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL
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2022-05-06 10:25:46 +02:00
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#include <zephyr/logging/log.h>
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2018-10-11 16:27:46 +02:00
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LOG_MODULE_REGISTER(clock_control);
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2017-08-26 15:43:53 +02:00
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2020-04-30 20:33:38 +02:00
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static int mcux_sim_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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2017-08-26 15:43:53 +02:00
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{
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2020-02-27 09:03:10 +01:00
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clock_ip_name_t clock_ip_name = (clock_ip_name_t) sub_system;
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2023-11-30 21:43:15 +01:00
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#ifdef CONFIG_ETH_NXP_ENET
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if ((uint32_t)sub_system == KINETIS_SIM_ENET_CLK) {
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clock_ip_name = kCLOCK_Enet0;
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}
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#endif
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2020-02-27 09:03:10 +01:00
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CLOCK_EnableClock(clock_ip_name);
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2017-08-26 15:43:53 +02:00
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return 0;
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}
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2020-04-30 20:33:38 +02:00
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static int mcux_sim_off(const struct device *dev,
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clock_control_subsys_t sub_system)
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2017-08-26 15:43:53 +02:00
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{
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2020-02-27 09:03:10 +01:00
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clock_ip_name_t clock_ip_name = (clock_ip_name_t) sub_system;
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CLOCK_DisableClock(clock_ip_name);
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2017-08-26 15:43:53 +02:00
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return 0;
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}
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2020-04-30 20:33:38 +02:00
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static int mcux_sim_get_subsys_rate(const struct device *dev,
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2017-08-26 15:43:53 +02:00
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clock_control_subsys_t sub_system,
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2020-05-27 18:26:57 +02:00
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uint32_t *rate)
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2017-08-26 15:43:53 +02:00
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{
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2018-04-23 21:27:43 +02:00
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clock_name_t clock_name;
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2020-05-27 18:26:57 +02:00
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switch ((uint32_t) sub_system) {
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2018-04-23 21:27:43 +02:00
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case KINETIS_SIM_LPO_CLK:
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clock_name = kCLOCK_LpoClk;
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break;
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2023-11-30 21:43:15 +01:00
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case KINETIS_SIM_ENET_CLK:
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clock_name = kCLOCK_CoreSysClk;
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break;
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2024-03-26 21:40:00 +01:00
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case KINETIS_SIM_ENET_1588_CLK:
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clock_name = kCLOCK_Osc0ErClk;
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break;
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2018-04-23 21:27:43 +02:00
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default:
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clock_name = (clock_name_t) sub_system;
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break;
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}
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2017-08-26 15:43:53 +02:00
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*rate = CLOCK_GetFreq(clock_name);
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return 0;
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}
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2020-05-11 20:56:08 +02:00
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#if DT_NODE_HAS_STATUS(DT_INST(0, nxp_kinetis_ke1xf_sim), okay)
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2020-12-15 19:20:28 +01:00
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#define NXP_KINETIS_SIM_NODE DT_INST(0, nxp_kinetis_ke1xf_sim)
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2020-03-24 20:11:52 +01:00
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
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2020-02-13 12:24:46 +01:00
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#define NXP_KINETIS_SIM_CLKOUT_SOURCE \
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2020-03-24 20:11:52 +01:00
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DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
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2020-02-13 12:24:46 +01:00
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#endif
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2020-03-24 20:11:52 +01:00
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
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2020-02-13 12:24:46 +01:00
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#define NXP_KINETIS_SIM_CLKOUT_DIVIDER \
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2020-03-24 20:11:52 +01:00
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DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
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2020-02-13 12:24:46 +01:00
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#endif
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#else
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2020-12-15 19:20:28 +01:00
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#define NXP_KINETIS_SIM_NODE DT_INST(0, nxp_kinetis_sim)
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2020-03-24 20:11:52 +01:00
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_sim), clkout_source)
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2020-02-13 12:24:46 +01:00
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#define NXP_KINETIS_SIM_CLKOUT_SOURCE \
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2020-03-24 20:11:52 +01:00
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DT_PROP(DT_INST(0, nxp_kinetis_sim), clkout_source)
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2020-02-13 12:24:46 +01:00
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#endif
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2020-03-24 20:11:52 +01:00
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_sim), clkout_divider)
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2020-02-13 12:24:46 +01:00
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#define NXP_KINETIS_SIM_CLKOUT_DIVIDER \
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2020-03-24 20:11:52 +01:00
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DT_PROP(DT_INST(0, nxp_kinetis_sim), clkout_divider)
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2020-02-13 12:24:46 +01:00
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#endif
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#endif
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2020-04-30 20:33:38 +02:00
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static int mcux_sim_init(const struct device *dev)
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2017-08-26 15:43:53 +02:00
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{
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2020-02-13 12:24:46 +01:00
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#ifdef NXP_KINETIS_SIM_CLKOUT_DIVIDER
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2019-05-10 12:25:38 +02:00
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SIM->CHIPCTL = (SIM->CHIPCTL & ~SIM_CHIPCTL_CLKOUTDIV_MASK)
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2020-02-13 12:24:46 +01:00
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| SIM_CHIPCTL_CLKOUTDIV(NXP_KINETIS_SIM_CLKOUT_DIVIDER);
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2019-05-10 12:25:38 +02:00
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#endif
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2020-02-13 12:24:46 +01:00
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#ifdef NXP_KINETIS_SIM_CLKOUT_SOURCE
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2019-05-10 12:25:38 +02:00
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SIM->CHIPCTL = (SIM->CHIPCTL & ~SIM_CHIPCTL_CLKOUTSEL_MASK)
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2020-02-13 12:24:46 +01:00
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| SIM_CHIPCTL_CLKOUTSEL(NXP_KINETIS_SIM_CLKOUT_SOURCE);
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2019-05-10 12:25:38 +02:00
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#endif
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2017-08-26 15:43:53 +02:00
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return 0;
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}
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static const struct clock_control_driver_api mcux_sim_driver_api = {
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.on = mcux_sim_on,
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.off = mcux_sim_off,
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.get_rate = mcux_sim_get_subsys_rate,
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};
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2020-12-15 19:20:28 +01:00
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DEVICE_DT_DEFINE(NXP_KINETIS_SIM_NODE,
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2017-08-26 15:43:53 +02:00
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&mcux_sim_init,
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2021-04-28 10:19:07 +02:00
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NULL,
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2017-08-26 15:43:53 +02:00
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NULL, NULL,
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2021-10-18 21:45:17 +02:00
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PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY,
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2017-08-26 15:43:53 +02:00
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&mcux_sim_driver_api);
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