2019-11-01 13:45:29 +01:00
|
|
|
# Intel64-specific X86 subarchitecture options
|
|
|
|
|
2019-06-12 23:03:45 +02:00
|
|
|
# Copyright (c) 2019 Intel Corp.
|
|
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
2019-10-24 21:57:57 +02:00
|
|
|
if X86_64
|
2019-06-12 23:03:45 +02:00
|
|
|
|
2019-07-10 01:15:26 +02:00
|
|
|
config MAIN_STACK_SIZE
|
|
|
|
default 8192
|
|
|
|
|
|
|
|
config IDLE_STACK_SIZE
|
|
|
|
default 4096
|
|
|
|
|
|
|
|
config ISR_STACK_SIZE
|
2019-09-18 18:01:18 +02:00
|
|
|
default 16384
|
2019-07-10 01:15:26 +02:00
|
|
|
|
2022-02-17 17:09:09 +01:00
|
|
|
config TEST_EXTRA_STACK_SIZE
|
2019-07-10 01:15:26 +02:00
|
|
|
default 4096
|
|
|
|
|
|
|
|
config SYSTEM_WORKQUEUE_STACK_SIZE
|
|
|
|
default 8192
|
|
|
|
|
2020-09-22 22:59:11 +02:00
|
|
|
config X86_EXCEPTION_STACK_SIZE
|
2019-07-15 22:18:36 +02:00
|
|
|
int "Size of the exception stack(s)"
|
2020-09-22 23:00:17 +02:00
|
|
|
default 4096
|
2019-07-15 22:18:36 +02:00
|
|
|
help
|
|
|
|
The exception stack(s) (one per CPU) are used both for exception
|
|
|
|
processing and early kernel/CPU initialization. They need only
|
|
|
|
support limited call-tree depth and must fit into the low core,
|
|
|
|
so they are typically smaller than the ISR stacks.
|
|
|
|
|
2019-11-20 02:33:30 +01:00
|
|
|
config X86_EXCEPTION_STACK_TRACE
|
|
|
|
bool
|
|
|
|
default y
|
|
|
|
depends on EXCEPTION_STACK_TRACE
|
|
|
|
depends on NO_OPTIMIZATIONS
|
|
|
|
help
|
|
|
|
Internal config to enable runtime stack traces on fatal exceptions.
|
|
|
|
|
2019-09-30 19:28:36 +02:00
|
|
|
config SCHED_IPI_VECTOR
|
|
|
|
int "IDT vector to use for scheduler IPI"
|
2019-12-18 23:12:54 +01:00
|
|
|
default 34
|
2019-09-30 19:28:36 +02:00
|
|
|
range 33 255
|
|
|
|
depends on SMP
|
|
|
|
|
2020-10-15 23:43:29 +02:00
|
|
|
config TLB_IPI_VECTOR
|
|
|
|
int "IDT vector to use for TLB shootdown IPI"
|
|
|
|
default 35
|
|
|
|
range 33 255
|
|
|
|
depends on SMP
|
|
|
|
|
2019-09-18 18:01:18 +02:00
|
|
|
# We should really only have to provide one of the following two values,
|
|
|
|
# but a bug in the Zephyr SDK for x86 precludes the use of division in
|
|
|
|
# the assembler. For now, we require that these values be specified manually,
|
|
|
|
# and we check to be sure they're a valid combination in arch.h. yes, ugh.
|
|
|
|
|
2019-07-16 01:22:44 +02:00
|
|
|
config ISR_DEPTH
|
|
|
|
int "Maximum IRQ nesting depth"
|
|
|
|
default 4
|
|
|
|
help
|
|
|
|
The more nesting allowed, the more room is required for IRQ stacks.
|
|
|
|
|
2019-09-18 18:01:18 +02:00
|
|
|
config ISR_SUBSTACK_SIZE
|
|
|
|
int "Size of ISR substacks"
|
|
|
|
default 4096
|
|
|
|
help
|
|
|
|
Number of bytes from the ISR stack to reserve for each nested IRQ
|
|
|
|
level. Must be a multiple of 16 to main stack alignment. Note that
|
|
|
|
CONFIG_ISR_SUBSTACK_SIZE * CONFIG_ISR_DEPTH must be equal to
|
|
|
|
CONFIG_ISR_STACK_SIZE.
|
|
|
|
|
2019-11-05 23:00:30 +01:00
|
|
|
config X86_STACK_PROTECTION
|
|
|
|
bool
|
|
|
|
default y if HW_STACK_PROTECTION
|
|
|
|
select THREAD_STACK_INFO
|
2024-04-01 22:05:43 +02:00
|
|
|
imply THREAD_STACK_MEM_MAPPED
|
2019-11-05 23:00:30 +01:00
|
|
|
help
|
|
|
|
This option leverages the MMU to cause a system fatal error if the
|
|
|
|
bounds of the current process stack are overflowed. This is done
|
|
|
|
by preceding all stack areas with a 4K guard page.
|
|
|
|
|
2019-11-21 21:52:37 +01:00
|
|
|
config X86_USERSPACE
|
|
|
|
bool
|
|
|
|
default y if USERSPACE
|
|
|
|
select THREAD_STACK_INFO
|
|
|
|
help
|
|
|
|
This option enables APIs to drop a thread's privileges down to ring 3,
|
|
|
|
supporting user-level threads that are protected from each other and
|
|
|
|
from crashing the kernel.
|
|
|
|
|
2019-10-24 21:57:57 +02:00
|
|
|
endif # X86_64
|