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zephyr/dts/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

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dts: riscv: Add sifive,plic-1.0.0 binding and fix riscv,ndev values Add a new sifive,plic-1.0.0 binding that inherits from the riscv,plic0 binding. The new binding adds a required riscv,ndev property, which gives the number of external interrupts supported. Use the new binding for microsemi-miv.dtsi (with a value of 31 for riscv,ndev, from http://www.actel.com/ipdocs/MiV_RV32IMAF_L1_AHB_HB.pdf) and riscv32-fe310.dtsi (which already assigns riscv,ndev). Also remove a spurious riscv,ndev assignment from riscv32-litex-vexriscv.dtsi. Also make edtlib and the old scripts/dts/ scripts replace '.' in compatible strings with '_' when generating identifiers. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-08-01 18:14:52 +02:00
# Copyright (c) 2018, SiFive Inc.
# SPDX-License-Identifier: Apache-2.0
description: SiFive RISCV-V platform-local interrupt controller
scripts: dts: Simplify and improve 'compatible' matching Instead of properties: compatible: constraint: "foo" , just have compatible: "foo" at the top level of the binding. For backwards compatibility, the old 'properties: compatible: ...' form is still accepted for now, and is treated the same as a single-element 'compatible:'. The old syntax was inspired by dt-schema (though it isn't dt-schema-compatible), which is in turn a thin wrapper around json-schema (the idea is to transform .dts files into YAML and then verify them). Maybe the idea was to gradually switch the syntax over to dt-schema and then be able to use unmodified dt-schema bindings, but dt-schema is really a different kind of tool (a completely standalone linter), and works very differently from our stuff (see schemas/dt-core.yaml in the dt-schema repo to get an idea of just how differently). Better to keep it simple. This commit also piggybacks some clarifications to the binding template re. '#cells:'. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-08-19 20:32:25 +02:00
compatible: "sifive,plic-1.0.0"
dts/bindings: Convert bindings to new include syntax Convert from: inherits: !include spi-device.yaml to: include: spi-device.yaml Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-22 01:10:12 +02:00
include: riscv,plic0.yaml
dts: riscv: Add sifive,plic-1.0.0 binding and fix riscv,ndev values Add a new sifive,plic-1.0.0 binding that inherits from the riscv,plic0 binding. The new binding adds a required riscv,ndev property, which gives the number of external interrupts supported. Use the new binding for microsemi-miv.dtsi (with a value of 31 for riscv,ndev, from http://www.actel.com/ipdocs/MiV_RV32IMAF_L1_AHB_HB.pdf) and riscv32-fe310.dtsi (which already assigns riscv,ndev). Also remove a spurious riscv,ndev assignment from riscv32-litex-vexriscv.dtsi. Also make edtlib and the old scripts/dts/ scripts replace '.' in compatible strings with '_' when generating identifiers. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-08-01 18:14:52 +02:00
properties:
yamllint: indentation: fix dts/bindings/ Fix the YAML files indentation for files in dts/bindings/. Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-03 20:21:25 +01:00
riscv,ndev:
type: int
description: Number of external interrupts supported
required: true
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