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• 7a3d8f79c2 ch81: implement a GPIO port and tidy up the UART main Michael Hope 2025-10-12 12:29:27 +02:00
• f952129bbe ch81: move the kernel image to flash Michael Hope 2025-10-12 10:10:28 +02:00
• 6277b5003f ch81: add a cache Michael Hope 2025-10-11 12:50:52 +02:00
• 09317ef550 ch81: split the board out of the core emulator Michael Hope 2025-10-10 20:05:52 +02:00
• cd1a02611a ch81: add partitions to the flash Michael Hope 2025-10-10 19:24:30 +02:00
• 2e0b504b9d ch81: fix the CI build Michael Hope 2025-10-05 19:56:39 +02:00
• 4cda29192d ch81: remove unused debugging code Michael Hope 2025-10-05 19:53:10 +02:00
• 19bb6e55ac ch81: tie the loader into the SPI flash Michael Hope 2025-10-05 19:52:55 +02:00
• 9cd521207b ch81: change to the qemu_x86 board to get SPI NOR Michael Hope 2025-10-05 19:50:27 +02:00
• 4a0c1a7122 ch81: split up rv32emu and add a XMODEM based loader Michael Hope 2025-10-05 16:54:27 +02:00
• 628d396042 ch81: initial PCB design Michael Hope 2025-10-05 10:39:43 +02:00
• 1d681b4fdc ch81: add support for caches by mapping Michael Hope 2025-10-04 20:01:15 +02:00
• 694dda7f17 ch81: switch to my fork of mini-rv32ima Michael Hope 2025-10-04 18:19:23 +02:00
• e5ea01e9fa ch81: switch to using the generated constants everywhere Michael Hope 2025-10-04 18:02:09 +02:00
• 9a01448515 ch81: pull the emulator config from Devicetree Michael Hope 2025-10-04 17:18:42 +02:00
• 63361b4f88 ch81: added coremark to third_party Michael Hope 2025-10-04 13:40:58 +02:00
• 8c5458d70a ch81: add mini-rv32ima to third_party Michael Hope 2025-10-04 13:32:00 +02:00
• 8c2fbab90b ch81: update to match the hardwares 8 MIB of RAM Michael Hope 2025-10-04 13:28:23 +02:00
• 5fb4569649 ch81: use phram to mount the squashfs rootfs Michael Hope 2025-09-29 20:09:23 +02:00
• 77045dc344 ch81: re-add the mini-rv32ima specific CSRs used for hvc0 Michael Hope 2025-09-28 20:12:56 +02:00
• 34e4eaf50a ch81: implement the console and remove unused code Michael Hope 2025-09-27 21:21:20 +02:00
• 18dd0dd045 ch81: add an experimental rv32 emulator Michael Hope 2025-09-27 19:25:29 +02:00
• be1a765047 ch81: use std::max and a namespace Michael Hope 2025-09-21 19:40:31 +02:00
• 171d36b57f ch81: render the D_FILE to the console Michael Hope 2025-09-21 19:30:34 +02:00
• 224abd5ca8 ch81: add a z80emu test Michael Hope 2025-09-21 15:30:27 +02:00
• a15e3fbceb ch81: move z80emu out to lib in preperation for test Michael Hope 2025-09-21 14:44:16 +02:00
• a6c9c83c83 ch81: move the documented flags define to board configuration Michael Hope 2025-09-21 14:41:32 +02:00
• d474669cb8 ch81: change the board to a inlined template parameter Michael Hope 2025-09-21 14:28:59 +02:00
• e97c491d96 ch81: flatten status_ out into the class Michael Hope 2025-09-21 14:10:40 +02:00
• 231aeacb77 ch81: revert the macros.h cycle tracker Michael Hope 2025-09-20 14:12:46 +02:00
• cef05a6887 ch81: start adding the ZX81 core Michael Hope 2025-09-20 14:12:11 +02:00
• 7df308a9a1 ch81: update macros.h to use state_ Michael Hope 2025-09-14 17:32:02 +02:00
• 8da647e175 ch81: shrink the condition tables Michael Hope 2025-09-14 16:15:37 +02:00
• f8caf4aa2f ch81: remove a test by switching to a enum class Michael Hope 2025-09-14 16:00:14 +02:00
• 6e69129baa ch81: flatten state into the class and switch to a address decoder Michael Hope 2025-09-14 15:08:11 +02:00
• e509a404bb ch81: optimise the decoder and run on the ch32v006evt Michael Hope 2025-09-14 14:09:16 +02:00
• 8186a45b10 ch81: continue moving z80emu to C++ Michael Hope 2025-09-14 13:03:03 +02:00
• 7d97c9edfa ch81: rename z80emu.c to .cc and clang-format Michael Hope 2025-09-14 11:29:38 +02:00
• 40381170fa ch81: import z80emu.c before reworking Michael Hope 2025-09-14 11:28:19 +02:00
• 67fefb0884 ch81: switch the build to forgejo Michael Hope 2025-09-13 20:28:59 +02:00
• 9e3dc7d610 ch81: add a Zephyr build of z80emu Michael Hope 2025-09-13 20:16:51 +02:00
• e70ac24a99 ch81: and z80emu and incbin Michael Hope 2025-09-13 20:16:21 +02:00
• b8d60c06fc ch81: remove the original, icomplete tuxli Michael Hope 2025-09-13 16:47:00 +02:00
• 413f53c5a6 ch81: move core into experimental to speed things up Michael Hope 2025-09-13 16:45:53 +02:00
• 511c66b4b7 ch81: add AnyReg16 and AnyRstLiteral Michael Hope 2025-08-18 19:50:42 +02:00
• bf70abc1f7 ch81: normalise the OP r, * and OP *, r' forms Michael Hope 2025-08-17 18:52:51 +02:00
• 4a825e68a8 ch81: flattened FlagSet into Flag Michael Hope 2025-08-17 17:43:41 +02:00
• 71d0c631d6 ch81: disable some more undocumented opcodes Michael Hope 2025-08-06 21:05:29 +02:00
• 499702f6da ch81: add some undocumented opcodes Michael Hope 2025-08-06 21:04:53 +02:00
• 68aa030055 ch81: implement RLD, RRD Michael Hope 2025-08-06 20:43:48 +02:00
• bd5dc36cda ch81: disable the undocumented instruction tests Michael Hope 2025-08-06 20:43:31 +02:00
• b0cd04105f ch81: stop execution on Bug() Michael Hope 2025-08-05 08:12:35 +02:00
• eeaeabb3ac ch81: implement LD A,{R,I} Michael Hope 2025-08-04 21:22:56 +02:00
• 310b99115e ch81: implement CPI, CPIR, CPD, CPDR, RETI, and RETN Michael Hope 2025-08-04 21:07:54 +02:00
• 87c75cf582 ch81: implement LDI, LDD, LDIR, and LDDR Michael Hope 2025-08-04 20:33:13 +02:00
• d170f576ca ch81: implement BIT, SET, RES Michael Hope 2025-08-03 17:08:29 +02:00
• d44f2291ba ch81: implemented 16 bit ADD, ADC, SBC Michael Hope 2025-08-03 16:50:24 +02:00
• 67a9032639 ch81: implement NEG using SUB Michael Hope 2025-08-03 10:20:13 +02:00
• dbdddd6f84 ch81: move arithmetic out and implement CP Michael Hope 2025-08-03 10:01:12 +02:00
• 53a114526a ch81: implement add, sub using the techniques from fabgl Michael Hope 2025-08-02 19:37:44 +02:00
• 616cbb7359 ch81: implement the shift instructions Michael Hope 2025-08-02 17:40:13 +02:00
• 472bd4f9c3 ch81: add z80test Michael Hope 2025-08-02 11:57:45 +02:00
• 7451fa625a ch81: add a continious build Michael Hope 2025-08-02 11:50:18 +02:00
• e5aceb486a ch81: implement SCF Michael Hope 2025-08-02 11:30:44 +02:00
• b71b893ace ch81: implement most of DAA Michael Hope 2025-08-02 11:12:09 +02:00
• c1fec67c06 ch81: implement parity for the bitwise instructions Michael Hope 2025-08-01 20:19:52 +02:00
• b5b741833e ch81: add Sjasm Michael Hope 2025-08-01 16:28:29 +02:00
• 7d81c3c7b9 ch81: ignore the PC before flags are masked Michael Hope 2025-08-01 16:27:44 +02:00
• 51c5b045c5 ch81: move out of tools and make it build from scratch Michael Hope 2025-08-01 15:52:31 +02:00
• 6acb0e514a ch81: passes through self test dev Michael Hope 2025-07-26 13:32:06 +00:00
• a62d9c22a8 ch81: fix ADD/SUB for other registers; add a Ld16 Michael Hope 2025-07-26 13:31:49 +00:00
• c5f17f9762 ch81: create a tool to diff two runs Michael Hope 2025-07-26 13:30:27 +00:00
• 9ef1afbb2a ch81: bump before reinstalling Michael Hope 2025-07-21 18:01:21 +00:00
• 32a94179eb ch81: implement nop, ld, and add Michael Hope 2025-07-16 17:02:19 +00:00
• 60d616d9b6 ch81: added the left and right fetchers and fixed condition codes Michael Hope 2025-07-16 14:42:41 +00:00
• 9ef1dab1a2 ch81: tidied up the table rendering Michael Hope 2025-07-16 12:11:18 +00:00
• 4c9b027f77 ch81: rename instruction to opcode to match the datasheet Michael Hope 2025-07-16 12:00:32 +00:00
• 28ee259464 ch81: pull the two-operand form out of genz80 Michael Hope 2025-07-16 11:43:40 +00:00
• fcacd7f902 ch81: split expansion out from rendering Michael Hope 2025-07-16 11:23:54 +00:00
• 36450fbaa0 ch81: split genz80 into functional areas Michael Hope 2025-07-14 18:00:34 +00:00
• 3bba8dbe33 ch81: start refactoring genz80 Michael Hope 2025-07-14 17:18:05 +00:00
• 8a04b199b7 ch81: before switching to a decode table Michael Hope 2025-06-28 16:48:19 +00:00
• 5591ef98e7 ch81: denormalise the bit and register combinations Michael Hope 2025-06-22 14:26:42 +00:00
• 3943c12ce2 ch81: parse the opcode table into a typed format Michael Hope 2025-06-22 11:35:51 +00:00
• cefef24440 ch81: first steps on a Z80 decode generator Michael Hope 2025-06-11 18:34:58 +00:00
• 7d3bced494 ch81: add a genrule for the font Michael Hope 2025-06-09 10:52:43 +00:00
• 3ecf3b2bd2 ch81: add a drone build config Michael Hope 2025-06-09 10:12:14 +00:00
• a71e8fda3c ch81: add inverted character support Michael Hope 2025-06-09 10:04:35 +00:00
• f4b202268c ch81: use a timer channel for the back porch Michael Hope 2025-05-31 18:20:12 +00:00
• cc9f622be6 ch81: NTSC seems to render OK, with shimmer Michael Hope 2025-05-31 15:05:14 +00:00
• 6cfa43de57 ch81: switch to NTSC and a different VSYNC pattern Michael Hope 2025-05-31 14:15:09 +00:00
• 8764890c54 ch81: fix up the DMA support and move timing constatns to a file Michael Hope 2025-05-30 18:57:47 +00:00
• 7a1d89ab35 ch81: use DMA to write to SPI Michael Hope 2025-05-30 16:07:53 +00:00
• 62b3022e07 ch81: move rendering to a function Michael Hope 2025-05-30 14:45:43 +00:00
• f70e1aeaa5 ch81: move the PWM channel to a templated, inlined class Michael Hope 2025-05-30 08:56:39 +00:00
• cca03df184 ch81: switch to TIM1 so it can trigger the SPI DMA Michael Hope 2025-05-30 07:45:38 +00:00
• e2f222f45a ch81: add a front and back porch Michael Hope 2025-05-29 10:43:20 +00:00
• b70d9568ba ch81: initial but rough video display Michael Hope 2025-05-29 09:18:33 +00:00
• 0d23783922 ch81: initial but rough video display Michael Hope 2025-05-29 09:17:03 +00:00
• 43d5de3a10 ch81: start enabling the DMA driver Michael Hope 2025-05-25 18:45:36 +00:00